Time-Interleaved ADCs

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Skew (Timing Mismatch) Calibration

TODO 📅

M. Gu, Y. Tao, Y. Zhong, L. Jie and N. Sun, "Timing-Skew Calibration Techniques in Time-Interleaved ADCs," in IEEE Open Journal of the Solid-State Circuits Society, vol. 5, pp. 1-10, 2025 [https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10804623]

S. Chen, L. Wang, H. Zhang, R. Murugesu, D. Dunwell, A. Chan Carusone, “All-Digital Calibration of Timing Mismatch Error in Time-Interleaved Analog-to-Digital Converters,” IEEE Transactions on VLSI Systems, Sept. 2017. [PDF, slides]

B. Razavi, "Problem of timing mismatch in interleaved ADCs," Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, San Jose, CA, USA, 2012 [https://www.seas.ucla.edu/brweb/papers/Conferences/BRCICC12.pdf]

resync (alignment)

TODO 📅

Multi-Phase Clock Generation (MPCG)

TODO 📅

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Interleaver

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Direct Interleaver

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similar to increase the resolution of the flash ADC with more parallel comparators

De-multiplexing Interleaver

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it is the front-end samplers that determine timing/bandwidth mismatch errors

Re-sampling Interleaver

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back-end re-sampling occur after the front-end, two \(\frac{KT}{C}\) contribution in total noise (De-multiplexing Interleaver only one \(\frac{KT}{C}\))

without buffer, charging distribution reduce signal and reduce SNR, but buffers give excess noise

Interleaver Model

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Interleaving Errors

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Offset Mismatch Error

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Gain Mismatch Error

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Timing Mismatch Error

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\(\pi/2\)-rad phase: the maximum error occurs at the zero crossing and not on the peaks (Gain Mismatch error)

Frequency-dependent: the higher frequency input signal \(f_\text{in}\), the larger error becomes

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\(\pi/2\) phase shift \[ e^{j\pi/2} = j \] frequency-dependent \[ V^{'} \propto f \]

In time domain \[ \frac{d\sin(\omega t)}{dt} = \omega \cos(\omega t) \propto \omega \]

Bandwidth Mismatch Errors

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Overlapping versus Non-overlapping track time

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tracking accuracy stay same, Cin (2Cs) counteract the longer tracking

Summing Interleaved Alias

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The sampling function - impulse train is \[ s(t) = \sum_{n=-\infty}^{\infty}\left[ \delta(t-n4T_s) + \delta(t-n4T_s-T_s) + \delta(t-n4T_s-2T_s) + \delta(t-n4T_s-3T_s)\right] \]

Its Fourier transform is \[\begin{align} S(f) &= \frac{2\pi}{4T}\sum_{k=-\infty}^{\infty}\left[\delta(f-k\frac{f_s}{4}) + e^{-j2\pi f\cdot T_s}\delta(f-k\frac{f_s}{4}) + e^{-j2\pi f\cdot 2T_s}\delta(f-k\frac{f_s}{4}) + e^{-j2\pi f\cdot 3T_s}\delta(f-k\frac{f_s}{4}) \right] \\ &= \frac{2\pi}{4T}\sum_{k=-\infty}^{\infty}\left(1+e^{-j2\pi\frac{f}{f_s}} + e^{-j4\pi\frac{f}{f_s}} + e^{-j6\pi\frac{f}{f_s}} \right) \delta(f-k\frac{f_s}{4}) \\ &= \frac{2\pi}{4T}\sum_{k=-\infty}^{\infty}\left(1+e^{-jk\frac{\pi}{2}} + e^{-jk\pi} + e^{-jk\frac{3\pi}{2}} \right) \delta(f-k\frac{f_s}{4}) \end{align}\]

We define \(M[k] = 1+e^{-jk\frac{\pi}{2}} + e^{-jk\pi} + e^{-jk\frac{3\pi}{2}}\), which is periodic, i.e. \(M[k]=M[k+4]\) \[ M[k]=\left\{ \begin{array}{cl} 4 & : \ k = 4m \\ 0 & : \ k=4m+1 \\ 0 & : \ k=4m+2 \\ 0 & : \ k=4m+3 \\ \end{array} \right. \]

That is \[ S(f) = \frac{2\pi}{T}\sum_{k=-\infty}^{\infty} \delta(f-kf_s) \]

Alias has same frequency for each slice but different phase: Alias terms sum to zero if all slices match exactly

Random Chopping in TI-ADC

image-20240929215927957

\[ D_n(kT) = (G_n R(kT) V(kT) + O_n)R(kT)= C_n V(kT) + R(kT)O_n \]

reference

John P. Keane, ISSCC2020 T5: "Fundamentals of Time-Interleaved ADCs" [https://www.nishanchettri.com/isscc-slides/2020%20ISSCC/TUTORIALS/T5Visuals.pdf]

Yohan Frans, CICC2019 ES3-3- "ADC-based Wireline Transceivers" [pdf]

Samuel Palermo, ISSCC 2018 T10: ADC-Based Serial Links: Design and Analysis [https://www.nishanchettri.com/isscc-slides/2018%20ISSCC/TUTORIALS/T10/T10Visuals.pdf]

ISSCC2015 F1: High-Speed Interleaved ADCs [https://picture.iczhiku.com/resource/eetop/wykrheUfrWasiMVX.pdf]

Poulton, Ken. ISSCC2009 "Time-Interleaved ADCs, Past and Future" (slides)

—. CICC2010 "GHz ADCs: From Exotic to Mainstream", tutorial session, (slides)

—. ISSCC2015 "Interleaved ADCs Through the Ages", (slides)

Ewout Martens. ESSCIRC 2019 Tutorials: Advanced Techniques for ADCs for 5G Massive MIMO [https://youtu.be/7hYichGGU6k]

Athanasios Ramkaj. January 26, 2022, IEEE SSCS Santa Clara Valley Section Technical Talk: Design Considerations Towards Optimal High-Resolution Wide-Bandwidth Time-Interleaved ADCs [https://youtu.be/k3jY9NtfYlY?si=K9AdT9QzGxOnI5WG]

Ahmed M. A. Ali 2016, "High Speed Data Converters" [pdf]

S. Jang, J. Lee, Y. Choi, D. Kim, and G. Kim, "Recent advances in ultra-high-speed wireline receivers with ADC-DSP-based equalizers," IEEE Open Journal of the Solid-State Circuits Society (OJ-SSCS), vol. 4, pp. 290-304, Nov. 2024.

Yida Duan. Design Techniques for Ultra-High-Speed Time-Interleaved Analog-to-Digital Converters (ADCs) [http://www2.eecs.berkeley.edu/Pubs/TechRpts/2017/EECS-2017-10.pdf]

Preview Lecture #1 - "Extreme SAR ADCs" Online Course (2024) - Prof. Chi-Hang Chan (U. of Macau) [https://youtu.be/rgMRL4QZ-wA]