Inspection of Phase Noise

How to Identify the Source of Phase Jitter through Phase Noise Plots [https://www.sitime.com/company/newsroom/blog/how-identify-source-phase-jitter-through-phase-noise-plots]

AN10072 Determine the Dominant Source of Phase Noise, by Inspection [https://www.sitime.com/support/resource-library/application-notes/an10072-determine-dominant-source-phase-noise-inspection]

4-minute Clinic: Determine the Dominant Source of Jitter by Inspection of Phase Noise Plot [https://youtu.be/2elHk3v45Pk]

a -10 dB/decade reference line can be used to pinpoint the location in a phase noise curve that dominates its integral

image-20250720154715877

image-20250720155328050

Reference-Clock Phase Noise in PLL

Gary Giust. How to Evaluate Reference-Clock Phase Noise in High-Speed Serial Links [expanded version], [compact version]

G. Richmond, "Refclk Fanout Best Practices for 8GT/s and 16GT/s Systems," PCI-SIG Developers Conference, June 7, 2017

Knowing how input phase noise aliases when sampled by a PLL

image-20250719113300286


An alternate view of phase noise aliasing during the sampling process

  • Instead of mirroring the jitter-transfer function located below \(F_S/2\) across spectral boundaries located at integer multiples of \(F_S/2\) (i.e. 50 MHz) as shown in Figure 2 (a)
  • we could alternatively fold the portion of the Raw Data curve located above \(F_S/2\) across these spectrum boundaries to appear below \(F_S/2\) as shown in Figure 2 (b)

image-20250719120321878

Integrating the combined area under each Filtered Data curve shown in Figure 2 (b) is mathematically equivalent to integrating the entire Filtered Data curve shown in Figure 2 (a)


image-20250720075655909


Phase Noise Analyzer vs TIE jitter using Real-time Oscilloscope

image-20250720083138045

Since an oscilloscope observes jitter similar to a real system, we regard its result as the gold standard against which other methods may be judged

Flat Phase Noise Extension to twice the clock frequency

image-20250720090755239

Phase Noise Aliasing & Integration Limits

These two types of measurements deliver the same rms jitter of \(f_{CK}\)

  • both rising and falling: integrated from \(-f_{CK}\) to \(+f_{CK}\)
  • only the rising (or falling) edges: integrated from \(-f_{CK}/2\) to \(+f_{CK}/2\)

image-20250524074831161

image-20250523221143537

temporal autocorrelation and Wiener-Khinchin theorem is more appropriate to arise rms value

Y. Zhao and B. Razavi, "Phase Noise Integration Limits for Jitter Calculation,"[https://www.seas.ucla.edu/brweb/papers/Conferences/YZ_ISCAS_22.pdf]

G. Giust, "Phase Noise Aliases as TIE Jitter," Signal Integrity Journal, July 23, 2018 [https://www.signalintegrityjournal.com/articles/912-phase-noise-aliases-as-tie-jitter]

Jitter and Edge phase noise

[https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/56929/how-to-derive-edge-phase-noise-from-output-noise-in-sampled-pnoise-simulation/1388888]

Shawn Logan, Summary of Study of Cadence Sampled Phase Noise and Jitter Definitions with a Comparison to Conventional Time Interval Error (TIE) for a Driven Circuit [www.dropbox.com/s/3m531dl4fl7bwbr/jee_computation_example_sml_032823v1p0.pdf]

timeaverage noise (phase-noise) & sampled noise (edge-phase noise or jitter) spectrum

image-20250530203348622

Time-average noise analysis

image-20250530203720538image-20250530204820891

\(S_{\Delta f}(f)\) between \([\Delta f, F_0/2]\) may be less than that of other harmonic window

Sampled noise analysis

image-20250530204030405

image-20250530204222221

correlation

image-20250530205849830

image-20250530205919247

image-20250530210543667

VCO Phase Noise

pnoise - timeaverage

  1. Direct Plot/Pnoise/Phase Noise or

    image-20220511112856934

  2. manually calculate by definition

    image-20220511112806122

  3. output noise with unit dBc

    Direct Plot/Pnoise/Output Noise Units:dBc/Hz and Noise convention: SSB

    image-20220511113248984

The above method 2 and 3 only apply to timeaveage pnoise simulation,

pnoise - sampled(jitter)/Edge Crossing

EdgePhaseNoise.drawio

Direct Plot/Pnoise/Edge Phase Noise or

image-20220515214901120

Another way, the following equation can also be used for sampled(jitter)/Edge Crossing

1
PhaseNoise(dBc/Hz) = dB20( OutputNoise(V/sqrt(Hz)) / slopeCrossing / Tper*twoPi ) - dB10(2)

where dB10(2) is used to obtain SSB from DSB

image-20220511150337318

Output Noise of sampled(jitter) pnoise

The last section's Output Noise (V**2/Hz) can be obtained by transient noise simulation

The idea is that sample waveform with ideal clock, subtract DC offset, then fft(psd)

  • samplesRaw = sample(wv)
  • samplePost = samplesRaw - average(samplesRaw)
  • Output Noise (V**2/Hz) = psd(samplePost)

image-20220516184543148

image-20220516184844296

Expression:

image-20220516185506348

The computation cost is typically very high, and the accuracy is lesser as compared to PSS/Pnoise

Pnoise Sampled(jitter): Sampled Phase Option

  • Identical to noisetype=timedomain in old GUI
  • Use model:
    • Sampleds Per Period: number of ponits
    • Add Specific Points: specific time point, still time points

image-20220712085426461

image-20220712085836315

image-20220712090011204

pss beat freq = 5GHz

pnoise sweeptype: absolute, from 100k to 2.5GHz

Transient noise

phase noise from transient noise analysis

  1. The Phase Noise function is now available in the Direct Plot form (Results-Direct Plot-Main Form) after Transient Analysis is run
    • Absolute jitter Method
    • Direct Power Spectral Density Method
  2. PN phase noise function
    • Absolute jitter Method
    • Direct Power Spectral Density Method

Absolute jitter Method: Phase noise is defined as the power spectral density of the absolute jitter of an input waveform

and absolute jitter method is the default method

In below discussion, we only think about the absolute jitter method

PSD and Phase Noise

  • phase noise is single-sideband
  • psd is double-sideband
  • Then the ratio is 2

By PSS_Pnoise

jee

1
rfEdgePhaseNoise(?result "pnoise_sample_pm0" ?eventList 'nil) + 10 * log10(2)

convert single-sideband phase noise to psd by multiplying 2 or 10 * log10(2)

By trannoise PN function

1
PN(clip(VT("/Out1") 2.60417e-08 0.000400052) "rising" 1.65 ?Tnom (1 / 3.84e+07) ?windowName "Rectangular" ?smooth 1 ?windowSize 15000 ?detrending "None" ?cohGain 1 ?methodType "absJitter")

double-sideband psd

By trannoise psd and abs_jitter function

1
dB10(psd(abs_jitter(clip(VT("/Out1") 2.60417e-08 0.000400052) "rising" 1.65 ?Tnom (1 / 3.84e+07)) 2.60417e-08 0.000400052 15360 ?windowName "Rectangular" ?smooth 1 ?windowSize 15000 ?detrending "None" ?cohGain 1))

double-sideband psd

abs_jitter Y-Unit default is rad

Comparison

image-20220506225324377

PN's result is same with psd's

RMS value

  • build the abs_jitter function with seconds as the Y axis and add the stddev function to determine the Jee jitter value
  • or integrate psd

The RMS \(x_{\text{RMS}}\) of a discrete domain signal \(x(n)\) is given by \[ x_{\text{RMS}}=\sqrt{\frac{1}{N}\sum_{n=0}^{N-1}|x(n)|^2} \] Inserting Parseval's theorem given by \[ \sum_{n=0}^{N-1}|x(n)|^2=\frac{1}{N}\sum_{n=0}^{N-1}|X(k)|^2 \] allows for computing the RMS from the spectrum \(X(k)\) as \[ x_{\text{RMS}}=\sqrt{\frac{1}{N^2}\sum_{n=0}^{N-1}|X(k)|^2} \]

Remarks

Cadence Spectre's PN function may call abs_jitter and psd function under the hood.

Phase Noise in vsource

Suppose pnoise result of one block is shown as below, and the result is stimulus of following block

image-20250929215408888

image-20250929215620135

First export Output Noise and Edge Phase Noise, then select noiseModelType and noisefile respectively

image-20250929224438491

image-20250929221228963

Under vsource (Source type: pulse) with different amplitude & rising/falling time, simulation result demonstrate that Edge Phase Noise(dBc) maintain jitter or phase noise by tweaking voltage noise at edge under the hoods, however Noise Voltage(V^2/Hz) maintain voltage noise

In the conclusion, Edge Phase Noise(dBc) is preferred for phase noise evaluation

notice:

@(#)$CDS: spectre version 21.1.0 64bit 12/01/2023 07:24 (csvcm36c-1) $

@(#)$CDS: virtuoso version ICADVM20.1-64b 10/11/2023 09:26 (cpgbld01) $


SSB Phase Noise (dBc)

image-20250930185936617

image-20250930190216011

image-20250930190841282

Divider PN simulation

Cadence Support. "How to set up pss/pnoise when simulating a driven circuit or a VCO, both containing dividers"

image-20250930200829603

reference

Article (11514536) Title: How to obtain a phase noise plot from a transient noise analysis URL: https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1Od0000000nb1CEAQ

Article (20500632) Title: How to simulate Random and Deterministic Jitters URL: https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1O3w000009fiXeEAI

Cadence, Application Note: Understanding the relations between time-average noise (phase-noise) and sampled noise (edge-phase noise or jitter) in Pnoise analysis

Tutorial on Scaling of the Discrete Fourier Transform and the Implied Physical Units of the Spectra of Time-Discrete Signals Jens Ahrens, Carl Andersson, Patrik Höstmad, Wolfgang Kropp URL: https://appliedacousticschalmers.github.io/scaling-of-the-dft/AES2020_eBrief/

Tawna, "Modeling Oscillators with Arbitrary Phase Noise Profiles"[https://community.cadence.com/cadence_blogs_8/b/rf/posts/modeling-oscillators-with-arbitrary-phase-noise-profiles]

—, "How to Specify Phase Noise as an Instance Parameter in Spectre Sources (e.g. vsource, isource, Port)" [https://community.cadence.com/cadence_blogs_8/b/rf/posts/how-to-specify-phase-noise-as-an-instance-parameter-in-spectre-sources-e-g-vsource-isource-port]

Load-Transient Response

TODO 📅

Kelvin connection

Kelvin connection in IC design [https://analoghub.ie/category/Circuits/article/kelvinConnection]

The entire idea behind Kelvin connection is to separate the nodes that are carrying high currents from the sensing nodes to the feedback

image-20251028195823568

Error Amplifier

Using type B amplifier to drive the NMOS power stage will enhance the NMOS’s PSRR performance

image-20251004174521927

PSRR (Power Supply Rejection Ratio)

A good PSRR is important when an LDO is used as a sub-regulator in cascade with a switching regulator

image-20241206225227534

image-20241206225557514

The LDO would need to have a sufficiently high rejection at the switching frequency of the switching converter to filter out the ripples at that frequency

open-loop PSRR analysis method

Chen, Feng & Lu, Yasu & Mok, Philip. (2022). Transfer Function Analysis of the Power Supply Rejection Ratio of Low-Dropout Regulators and the Feed-Forward Ripple Cancellation Scheme. IEEE Transactions on Circuits and Systems I: Regular Papers. [https://sci-hub.se/10.1109/TCSI.2022.3167860]

neglect the contribution of the voltage regulation circuits to the PSRR

image-20251004180853406

image-20251005074333785


image-20251005081916049


image-20251005093247027

DC output impedance

The output impedance of the LDO at DC is known as its load regulation

DC output impedance of NMOS and PMOS LDO is the same for the same error amplifier gain

\[ R_{\text{out}} = \frac{1}{\beta A_{o1} g_{m2}} \]

image-20241202230138520

The NMOS LDO has a faster response to line transients than the PMOS LDO since it has better (smaller) PSRR

Power MOS gain affect on PMOS LDO

pwm_miller.drawio

DC gain \[ A_{dc} = g_mR_\text{ota} A_2 \] 3dB bandwidth \[ \omega_p = \frac{1}{R_\text{ota}(C_g+A_2C_c)} \] and GBW \[ \omega_u = \frac{g_m}{\frac{C_g}{A_2}+C_c} \]

image-20240803102158612

Feedforward Compensation with \(C_\text{FF}\)

  • Improved Noise
  • Improved Stability and Transient Response
  • Improved PSRR

outCc.drawio

\[\begin{align} R_1 \parallel \frac{1}{sC_{FF}} &= \frac{R_1}{1+sR_1C_{FF}} \\ Z_o &= \left( R_1\parallel \frac{1}{sC_{FF}}+R_2\right)\parallel \frac{1}{sC_L} \\ &=\frac{R_1+R_2+sR_1R_2C_{FF}}{s^2R_1R_2C_{FF}C_L + s[(R_1+R_2)C_L+R_1C_{FF}]+1} \\ A_{V2} &= g_m Z_o \\ &= g_m \frac{R_1+R_2+sR_1R_2C_{FF}}{s^2R_1R_2C_{FF}C_L + s[(R_1+R_2)C_L+R_1C_{FF}]+1} \\ \beta &= \frac{R_2}{\frac{R_1}{1+sR_1C_{FF}}+R_2} \\ &= \frac{R_2(1+sR_1C_{FF})}{R_1+R_2+sR_1R_2C_{FF}} \\ A_{V2}\beta &= \frac{g_mR_2(1+sR_1C_{FF})}{s^2R_1R_2C_{FF}C_L+s[(R_1+R_2)C_L+R_1C_{FF}]+1} \end{align}\]

That is, adding a \(C_{FF}\) also introduces a zero (\(\omega_z\)) and pole (\(\omega_p\)) into the LDO feedback loop

\[\begin{align} \omega_{po} &= \frac{1}{(R_1+R_2)C_L} \\ \omega_z &= \frac{1}{R_1C_{FF}} \\ \omega_{p} &= \frac{1}{(R_1 \parallel R_2)C_{FF}} \end{align}\]

Application Report SBVA042–July 2014, Pros and Cons of Using a Feedforward Capacitor with a Low-Dropout Regulator [https://www.ti.com/lit/an/sbva042/sbva042.pdf]

LDO Basics: Noise – How a Feed-forward Capacitor Improves System Performance [https://www.ti.com/document-viewer/lit/html/SSZTA13]

LDO Basics: Noise – How a Noise-reduction Pin Improves System Performance [https://www.ti.com/document-viewer/lit/html/SSZTA40]

NMOS Slave LDO

nmos_slave_psrr.drawio

\[\begin{align} \frac{V_g}{V_i} &=\frac{R||\frac{1}{s(C_g+C_{gs})}}{R||\frac{1}{s(C_g+C_{gs})}+\frac{1}{sC_{gd}}} \\ &= \frac{sRC_{gd}}{sR(C+C_{gd}+C_{gs})+1} \\ \frac{V_g}{V_i} &= -\frac{sC_{ds}+g_{ds}}{sC_{gs}+g_m} \end{align}\]

That is, \[ \omega_{z,d} \approx \frac{1}{R(\frac{g_m}{g_{ds}}C_{gd}+C)} \]

To calculate PSRR pole is similar with above PSRR zero, though \(V_o/V_i=0\), i.e. set \(V_0\) 0 potential \[ \omega_{p,d} \approx \frac{1}{R(\frac{C_s}{g_mR}+C)} \]

DC PSRR \[ \text{PSRR} = \frac{1}{g_mr_o} \]


image-20240726205718920

image-20240726205738664


PSRR @Vgate

psrr_vgate.drawio

KCL at output node

\[ g_m(-V_o\beta A_{E} - V_o) + \frac{V_i - V_o}{r_o} = \frac{V_o}{R_1+R_2} \]

Hence \[ \frac{V_o}{V_i} = \frac{1}{A_E\beta g_mr_o+g_mr_o +\frac{r_o}{R_1+R_2}+1} \approx \frac{1}{A_E\beta g_m r_o} \]

Through feedback loop, we derive \[ V_g = V_o \beta (-A_E) \approx \frac{V_i}{A_E\beta g_m r_o} \beta (-A_E) = -\frac{V_i}{g_mr_o} \]

That is \[ \frac{V_g}{V_i} \approx -\frac{1}{g_mr_o} \]

Due to closed loop, \(V_g\) and \(V_o\) is not source follower

High frequency PSRR

high-psrr.drawio

feedback resistor divider noise

fb_res_noise.drawio

assuming \(\text{LG} \gg 1\)

\[\begin{align} I_\text{t} &= \frac{V_\text{ref} - v_\text{n2}}{R_\text{2}} \\ V_\text{o} &= V_\text{ref} +v_\text{n1} + I_\text{t}R_\text{1} \\ \end{align}\]

Then \[ V_\text{o} = \frac{R_1+R_2}{R_2}V_\text{ref} + v_\text{n1} - \frac{R_1}{R_2}v_\text{n2} \] that is

\[ v_\text{no}^2 = v_\text{n1}^2 + \left(\frac{R_1}{R_2}\right)^2 v_\text{n2}^2 \]


image-20240816172605226

image-20240816173559747

\[ \text{vno1}^2= \text{vn1}^2+\text{vn2}^2/6^2=16.5758 + 99.45453/6^2 = 19.338425833 \]

reference

Hinojo, J.M., Martinez, C.I., & Torralba, A.J. (2018). Internally Compensated LDO Regulators for Modern System-on-Chip Design.

Chen, K.-H. (2016). Power Management Techniques for Integrated Circuit Design. Wiley-IEEE Press.

Morita, B.G. (2014). Understand Low-Dropout Regulator ( LDO ) Concepts to Achieve Optimal Designs.

H. -S. Kim, "Exploring Ways to Minimize Dropout Voltage for Energy-Efficient Low-Dropout Regulators: Viable approaches that preserve performance," in IEEE Solid-State Circuits Magazine, vol. 15, no. 2, pp. 59-68, Spring 2023, doi: 10.1109/MSSC.2023.3262767.

Ali Sheikholeslami, Circuit Intuitions: Voltage Regulators IEEE Solid-State Circuits Magazine, Vol. 12, Issue 4, to appear, Fall 2020.

Operational Transconductance Amplifier II Multi-Stage Designs [https://people.eecs.berkeley.edu/~boser/courses/240B/lectures/M07%20OTA%20II.pdf]

Toshiba, Load Transient Response of LDO and Methods to Improve it Application Note [https://toshiba.semicon-storage.com/info/application_note_en_20210326_AKX00312.pdf?did=66268]

Carusone, Tony Chan, David Johns, and Kenneth Martin. Analog integrated circuit design. John wiley & sons, 2011. [https://mrce.in/ebooks/Analog%20Integrated%20Circuit%20Design%202nd%20Ed.pdf]


Pavan Kumar Hanumolu. CICC 2015. "Low Dropout Regulators" [https://uofi.app.box.com/v/CICC15-LDO]

Mingoo Seok. ISSCC 2020 T7: "Basics of Digital Low-Dropout (LDO) Integrated Voltage Regulator" [https://www.nishanchettri.com/isscc-slides/2020%20ISSCC/TUTORIALS/T7Visuals.pdf]

Yan Lu, ISSCC2021 T10: "Fundamentals of Fully Integrated Voltage Regulators" [https://www.nishanchettri.com/isscc-slides/2021%20ISSCC/TUTORIALS/ISSCC2021-T10.pdf]

—, (Tsinghua U.) Preview - “Precision Low-Dropout Regulators” Online Course (2025) [https://youtu.be/IgWTou7Ikbs]

Mao, Xiangyu, Yan Lu, and Rui P. Martins. Fully-Integrated Low-Dropout Regulators. Springer, 2025.

Hyun-Sik Kim, Low-Dropout (LDO) Voltage Regulators – From Basics to Recent Design Trends (presented in A-SSCC 2022) [pdf]

A. Raychowdhury. ISSCC 2024 T2: Fundamentals of Digital and Digitally-Assisted Linear Voltage Regulators

image-20241124184248887


Mixed-Mode S-parameter

12 May 2021 Introduction to Mixed-Mode S-parameters [https://blog.teledynelecroy.com/2021/05/introduction-to-mixed-mode-s-parameters.html]

image-20251025193029645

image-20251025193127266


Bert Simonovich. A Guide for Single-Ended to Mixed-Mode S-parameter Conversions [https://www.signalintegrityjournal.com/articles/1832-a-guide-for-singleended-to-mixedmode-s-parameter-conversions]

img

single-ended S-parameters

image-20251025193503968

Mixed-mode S-parameters

img

img

image-20251025193746446


image-20251025204726806

image-20251025203655730

Missing Term in KVL

Prof. Kolb/Whites. EE 382 Applied Electromagnetics Lecture 8: Maxwell's Equations and Electrical CIrcuits [http://montoya.sdsmt.edu/ee382/lectures/382Lecture8.pdf]

image-20250713101205684

Transmission-line

image-20250718223340699

Telegrapher’s equations

EECS 723- Microwave Engineering Spring 2.1 -The Lumped Element Circuit Model for Transmission Lines

1/20/2005 [https://www.ittc.ku.edu/~jstiles/723/handouts/2_1_Lumped_Element_Circuit_Model_package.pdf]

note [https://www.ittc.ku.edu/~jstiles/723/handouts/section_2_1_The_Lumped_Element_Circuit_Model_package.pdf]

present [https://www.ittc.ku.edu/~jstiles/723/handouts/section_2_1_The_Lumped_Element_Circuit_Model_present.pdf]

image-20250713102519144

image-20250713102641016

Transmission Line Wave Equation

image-20250718220504696

image-20250713104729920

image-20250718224751665

Characteristic Impedance (\(Z_0\))

image-20250713112912199

image-20250713113651799


Remember, S-parameters don't mean much unless you know the value of the reference impedance (it's frequently called Z0).

simulator will read sp file's Z0 parameter

image-20220430214052538

image-20220430214136970

image-20220430214419283

The default Z0 exported by EMX is 50

Complex Propagation Constant \(\gamma\)

TODO 📅

Input impedance (Line Impedance)

image-20250718231905402

Reflection Coefficient

TODO 📅

image-20250719081121034

Steady-State Solution (DC voltage division)

Sam Palermo. [https://people.engr.tamu.edu/spalermo/ecen689/lecture3_ee689_tlines.pdf]

Kyoung-Jae Chung. Special Topics in Radiation Engineering (High-voltage pulsed power engineering) [https://ocw.snu.ac.kr/sites/default/files/NOTE/Lecture_03_Transmission%20line%20theory.pdf]

David R. Jackson. [https://courses.egr.uh.edu/ECE/ECE3317/SectionJackson/Class%20Notes/Notes%208%203317%20Transmission%20Lines%20(Bounce%20Diagram).pdf]

Shouri Chatterjee [https://web.iitd.ac.in/~shouri/ell112/material/txline.pdf]

How can I go from transmission line model to lumped elements model? [https://physics.stackexchange.com/a/386603]

image-20250713090925198

image-20250713084136902

image-20250713091613844


E157 Introduction to Radio Frequency Circuit Design [https://pages.hmc.edu/mspencer/e157/fa24/]

Eric Bogatin. Pop Quiz: When is an Interconnect Not a Transmission Line? [https://www.signalintegrityjournal.com/blogs/4-eric-bogatin-signal-integrity-journal-technical-editor/post/265-pop-quiz-when-is-an-interconnect-not-a-transmission-line]

Shen Lin. On-Chip Inductance and Coupling Effects [http://eda.ee.ucla.edu/pub/asic.pdf]

A. Deutsch et al., "When are transmission-line effects important for on-chip interconnections?," in IEEE Transactions on Microwave Theory and Techniques, vol. 45, no. 10, pp. 1836-1846, Oct. 1997

Ho, Ron. “Chip Wires: Scaling and Efficiency.” (2003). [https://www-vlsi.stanford.edu/people/alum/pdf/0303_Ho_Wires.pdf]

—. ISSCC 2007 T3: Dealing with Issues in VLSI Interconnect Scaling, by Ron Ho

Tony Chan Carusone. ISSCC 2017 T6: Signal Integrity Analysis for Gb/s Links

Byungsub Kim ISSCC 2022 T11: "Basics of Equalization Techniques: Channels, Equalization, and Circuits"

Voltage scattering

image-20250719072111526

image-20241112201300108

transmitted voltage \[ V= \frac{2Z_l}{Z_l+R_0}\frac{V_s}{2}= \frac{Z_l}{Z_l+R_0}\cdot V_s \]


image-20250719010415229

image-20250719081657119

image-20250719081836680

CHAPTER 6 Transmission-Line Essentials for Digital Electronics [https://ws.engr.illinois.edu/sitemanager/getfile.asp?id=178]

CHAPTER 7 Transmission-Line Analysis [https://ws.engr.illinois.edu/sitemanager/getfile.asp?id=199]

Voltage Transfer Function

image-20241030220203806

image-20241030220131714

image-20241030222403947

Reflection Coefficients

image-20241030222906229

image-20241030222923491

Impulse Response From Sparameters

David Banas. A comparison of different techniques (i.e. - windowing, vector fitting, etc.) for extracting the impulse response from S-parameters. [https://github.com/capn-freako/ImpulseResponseFromSparameters/tree/main]

TODO 📅

Rational Fit

Matlab/rationalfit

To resolve the convergence problem of s-parameter in Spectre simulator - rationalfit and write Verilog-A

image-20220630224525565

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filename  = 'touchstone/ISI.S4P';
s4p = read(rfdata.data, filename);
sdd_params = s2sdd(s2p.S_Parameters, 2);
sdd21 = squeeze(sdd_params(2, 1, :)); % s21
freq = s4p.Freq;

% rational fitting
weight = ones(size(sdd21));
weight(floor(end*3/4):end) = 0.2;
weight(2:10) = 0;

[hfit, errb] = rationalfit(freq, sdd21, 'IterationLimit', [4, 16], 'Delayfactor', 0.98, ...
'Weight', weight, 'Tolerance', -38, 'NPoles', 32);
[sdd21_fit, ff] = freqresp(hfit, freq);

figure(1)
plot(freq/1e9, db(sdd21), 'b-'); hold on;
plot(ff/1e9, db(sdd21_fit), 'r-'); hold off; grid on;
legend('sdd21', 'sdd21\_fit');
xlabel('Freq (GHz)');
ylabel('magnitude (dB)');


ts = 1e-12;
n = 2^18;
trise = 4e-14;
[yout, tout] = stepresp(hfit, ts, n, trise);
figure(2)
plot(tout*1e12, yout, 'b-'); grid on;
xlabel('Time (ps)');
ylabel('V');
title('Step Response');


% write verilog-A
writeva(hfit, 'channel_32poles.va');

Using S Parameters to Estimate Q

TODO 📅

Jeff Walling. ECE 5984 Using S Parameters to Estimate Q [https://youtu.be/PXgM6pGIRvk?si=YDeh-COQEBXKUiw-]

Spar in Tran simulation

image-20250705210519145

Spar in AC simulation

image-20250816221249094

image-20250816221939979

image-20250816222126241

reference

microwaves101, S-parameters (https://www.microwaves101.com/encyclopedias/s-parameters)

Pupalaikis, P. (2020). S-Parameters for Signal Integrity. Cambridge: Cambridge University Press. doi:10.1017/9781108784863

Coelho, C. P., Phillips, J. R., & Silveira, L. M. (n.d.). Robust rational function approximation algorithm for model generation. Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361). doi:10.1109/dac.1999.781313

Cadence IEEE IMS 2023, Introducing the Spectre S-Parameter Quality Checker and Rational Fit Model Generator [https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1O3w000009lplhEAA]

The Complex Art Of Handling S-Parameters: The importance of extraction and fitting to circuit simulation involving S-parameters [https://semiengineering.com/the-complex-art-of-handling-s-parameters]

Dr. John Choma. EE 541, Fall 2006: Course Notes #2 Scattering Parameters: Concept, Theory, and Applications [https://www.ieee.li/pdf/essay/scattering_parameters_concept_theory_applications.pdf]

Dr. Ray Kwok . Network Techniques: Conversion between Filter Transfer Function and Filter Scattering (SMatrix) Parameters [https://www.sjsu.edu/people/raymond.kwok/docs/project172/FTF%20to%20S-Matrix%20Spring%202011.pdf]

田庆诚教授 台湾中华大学 射频电路基础(公司培训)[https://www.bilibili.com/video/BV1LA41177wr/?p=3&share_source=copy_web&vd_source=5a095c2d604a5d4392ea78fa2bbc7249]

Three fast time-domain system simulation techniques:

  • single-bit response method
  • double-edge response method
  • multiple-edge response method

Single-Bit Response (SBR) Method

img

Overlapping portions of a pulse response from neighboring bits are referred to as intersymbol interference (ISI). A received waveform is formed by superimposing, in time, the pulse responses of each bit in the sequence, as illustrated in Figure 9, assuming symmetric positive and negative pulses are transmitted for 1s and 0s

image-20240824193208821

To avoid spurious glitches between consecutive ones, rising and falling edge responses shall be symmetric. This is the limitation of SBR method.

Let \(p(t)\) be the SBR of the channel, \(t_s\) be the data sampling phase, \(T\) be the bit time, \(N_c\) is the number of UI in stored pulse response and \(b_m\) be the \(m\)th transmitted symbol. The voltage seen by the receiver's data sampler at the \(m\)th data sample is determined by \[ y_m = \sum_{k=m-N_c+1}^{m}b_kp(t_s+(m-k)T) \] where \(b_k \in [0, 1]\) and \(p(t) \ge 0\)

We always prepend \(Nc-1\) 0s in random bit stream for consistency.

image-20220429112902281

For computation convenient, the pulse need to be positive. For differential signal and amplitude \(V_{peak}\), the peak to peak is \(-V_{peak}\) to \(+V_{peak}\). After pulse added by \(V_{peak}\), peak to peak is \(0\) to \(+2V_{peak}\).

image-20220429154336080

image-20220429154423247

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hold on;

yy_sum = zeros(OSR*Ns, Ns);
for idxBit = 1:Ns
bs_split = zeros(1, Ns+Nc-1);
bs_split(idxBit) = bs(idxBit);
yy = zeros(OSR, Ns);
for ii = Nc:Nc+Ns-1
bb = bs_split(ii:-1:ii-Nc+1);
yy(:,ii-Nc+1) = sum(bb.*yrps, 2);
end
yy_cont2 = reshape(yy, [], 1);
h = plot(yy_cont2);
h.Annotation.LegendInformation.IconDisplayStyle = 'off';
yy_sum(:, idxBit) = yy_cont2;
end
yy_sum = sum(yy_sum, 2); % merge
plot(yy_sum, 'k--');
plot(yy_cont, 'm-.');
grid on;
legend('sum', 'syn');
title('merge all single bit');
ylabel('mag');
xlabel('Time (\times Ts)');

The pulse response contain rising and falling edge. The 1 bit first rise from -1 to 1, then fall to -1; The 0 bit just do nothing for synthesized waveform with the help of falling edge of 1 bit.

The DC shift help deal with continuous 0 bits.

image-20220429174330324

another SBR example

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A = zeros(10,21);
n = [1:10];

% post cursor
for m = 1:3
A(m, 11+n(m)) = 0.5;
A(m, 11-n(m)) = 0.5;
end

% one
for m = 4:10
A(m, 11) = 1;
end

% h0 or main cursor
h0 = zeros(1, 21);
h0(1, 1) = 0.5;
h0(1, 21) = 0.5;
out = h0;

for m = 1:10
out = conv(out, A(m, :), "full");
end


stem(out)

143512636-0878e0fd-fe87-414c-9c73-52577eeb7593

143512677-ccefdf22-4e30-4e72-9220-bbe667671e79

S-Parameter to Single Bit Response (SBR)

Mike Li, "S-Parameter to Single Bit Response (SBR) Transformation and Convergence Study" [https://ieee802.org/3/bj/public/may12/li_01_0512.pdf]

TODO 📅

Double-Edge Response (DER) Method

To handle the more general cases, with asymmetric rising and falling edges, the system response can be constructed in terms of edge transitions instead of bit responses.

The DER method decomposes the input data pattern, in terms of rising and falling edge transitions. The system response can be calculated by superimposing the shifted versions of the rising and falling edge responses : \[ y_m = \sum_{k=m-N_c+1}^{m}(b_k-b_{k-1})s_k(t_s+(m-k)T) + y_{int} \] where

\[\begin{align} s_i(t) &= r(t) -V_{low} \quad \text{if} \: (b_i\gt b_{i-1}) \\ &= V_{high}-f(t) \quad \text{otherwise} \end{align}\]

\(r(t)\) and \(f(t)\) are the rising and falling edge responses,respectively. \(V_{high}\) and \(V_{low}\) are the steady state DC levels, in response to a constant stream of ones and zeros, respectively. \(y_{int}\) is the initial DC state (either \(V_{high}\) or \(V_{low}\) ).

We always prepend \(Nc\) 0s in random bit stream for consistency.

image-20220429191941805

der.drawio

image-20220430010336977

image-20220430013715680

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figure(1)
subplot(3, 1, 1)
plot(yrc);
hold on;
plot(yfc);
hold off;
legend('rising', 'falling')
grid on;
ylabel('mag');
xlabel('Time (\times Ts)');
title('step response');

subplot(3, 1, 2)
stem(bs, 'k'); grid on;
hold on;
stem((idxPreRspStart:idxPreRspEnd), bs(idxPreRspStart:idxPreRspEnd), "filled", 'r');
stem(idxPreRspStart, bs(idxPreRspStart), 'go');
stem(idxCurData, bs(idxCurData), "filled", 'm');
stem((idxPreRspStart:idxPreRspEnd)+0.5, 0.1.*bd(idxPreRspStart:idxPreRspEnd), 'bd-.');
hold off;
legend('', 'Nc bits', 'y_{int}', 'Current bit', 'Edge Transitions');
ylabel('mag');
xlabel('Time (\times UI)');
title('input stream');

subplot(3, 1, 3)
yy_cont = reshape(yy, [], 1); % continuous version
plot(yy_cont); grid on;
title('continuous yout')
ylabel('mag');
xlabel('Time (\times Ts)');

figure(2)
hold on;
for idx = idxPreRspStart+1-Nc:idxCurData+32-Nc
ys = yy(:, idx);
tt = ((idx-1)*OSR+1:idx*OSR);
h = plot(tt(:), ys(:), 'LineWidth',3);
h.Annotation.LegendInformation.IconDisplayStyle = 'off';
end
plot(yy_cont, 'm--', 'LineWidth',1);
hold off;
legend('syn')
ylabel('mag');
xlabel('Time (\times Ts)');
title('synthesize with step response');
grid on;

Reference

T. C. Carusone, "Introduction to Digital I/O: Constraining I/O Power Consumption in High-Performance Systems," in IEEE Solid-State Circuits Magazine, vol. 7, no. 4, pp. 14-22, Fall 2015

Oh, Kyung Suk Dan, and Xing Chao Chuck Yuan. High-Speed Signaling: Jitter Modeling, Analysis, and Budgeting. Prentice Hall, 2011.

Ren, Jihong and Kyung Suk Oh. “Multiple Edge Responses for Fast and Accurate System Simulations.” IEEE Transactions on Advanced Packaging 31 (2008): 741-748.

Shi, Rui. “Off-chip wire distribution and signal analysis.” (2008).

X. Chu, W. Guo, J. Wang, F. Wu, Y. Luo and Y. Li, "Fast and Accurate Estimation of Statistical Eye Diagram for Nonlinear High-Speed Links," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 7, pp. 1370-1378, July 2021, doi: 10.1109/TVLSI.2021.3082208.

image-20250816004521416

image-20250816003816639

jitter variance vs. phase noise

Note that \(L(f )\) is defined over positive frequencies only \((f \ge 0)\)

image-20250902231037546


image-20250901224816795 \[\begin{align} S_{jACC(N)}(f) &= |1-z^{-N}|^2\cdot S_{jABS}(f) \\ &= |1-\cos\theta +j\sin\theta|^2\cdot S_{jABS}(f) = ((1-\cos\theta)^2 + \sin^2\theta)\cdot S_{jABS}(f) \\ &= 2(1-\cos\theta)\cdot S_{jABS}(f) = 4\sin^2(\theta/2)\cdot S_{jABS}(f) \end{align}\]

where \(\theta = 2\pi f N/f_0\)

image-20250901233055582

As EQ(3.44), EQ(3.45)

the autocorrelation is the inverse Fouer transform of the PSD

\[ R_{\varphi}(t) = \int_{-\infty}^{+\infty} S_{\varphi} (f) e^{j2\pi f t} df \]

Then, \[\begin{align} R_{\varphi}(0) &= \int_{-\infty}^{+\infty} S_{\varphi} (f) df \\ R_{\varphi}(NT_0) &= \int_{-\infty}^{+\infty} S_{\varphi} (f) e^{j2\pi f NT_0} df \end{align}\]

Thus, yield EQ(3.48)

image-20250903184827248


Simplified PLL Phase Noise Profile

Absolute Jitter

TODO 📅

Period Jitter

image-20250902233638588


image-20250901233626772

image-20250901233756765


a random-walk DCO - \(1/f^2\) Phase Noise Profile

L. Avallone, M. Mercandelli, A. Santiccioli, M. P. Kennedy, S. Levantino and C. Samori, "A Comprehensive Phase Noise Analysis of Bang-Bang Digital PLLs," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 7, pp. 2775-2786, July 2021 [https://sci-hub.st/10.1109/TCSI.2021.3072344]

image-20250902232230515

image-20250902231843251

Even-odd Jitter (EOJ)

Jitter measurement Description
F/2 F/2 is the peak-to-peak amplitude of the periodic jitter occurring at 1/2 of the data rate.

Even-odd jitter, also known as F/2 jitter, arises from a clock signal's duty cycle not being perfectly 50%

image-20250816130508935

Even-odd jitter has been referred to as duty cycle distortion by other Physical Layer specifications for operation over electrical backplane or twinaxial copper cable assemblies

image-20250816130650378


image-20250816181004878

Comparing DCD and F/2 Jitter Using a BERTScope® Bit Error Rate Testing Application Note [https://download.tek.com/document/65W_26040_0_Letter.pdf]

Pulse Width Jitter (PWJ)

image-20250816125512147

image-20250816125533070

Jeff Morriss Updated 10/25/07. Analysis of 8G PCIe Pulse Width Jitter (UI to UI Jitter_10_25.ppt)


image-20250816132730999

Duty Cycle Distortion – DCD

Jitter measurement Description
DCD Duty Cycle Distortion is the peak-to-peak amplitude of the component of the deterministic jitter correlated with the signal polarity.

image-20250816081711834

image-20250816081808897


Jitter fundamental & How Isolating Root Causes of Jitter [https://picture.iczhiku.com/resource/eetop/ShKgzTEiUfdFOcvn.pdf]

There are two primary causes of DCD jitter which are usually generated within a transmitter

  • If the data input to a transmitter is theoretically perfect, but if the transmitter sampling threshold is offset from its ideal level, then the output of transmitter will have duty cycle distortion as a function of the slew rate of the data signal
  • Another cause of duty cycle distortion can be a mismatch/asymmetry in rising and falling edge speeds

image-20250816085315710


Unfortunately, other sources such as ISI almost always exist making it sometimes difficult to isolate the DCD component. One technique to test for DCD is to stimulate your system/components with a repeating 1-0-1-0… data pattern. This technique will eliminate inter-symbol interference (ISI) jitter and make viewing the DCD within the spectrum display much easier

Why clock pattern? That's because all symbols experience same inter-symbol interference, which are canceled out


image-20250816103444976


image-20250816180338475

[https://scdn.rohde-schwarz.com/ur/pws/dl_downloads/dl_application/application_notes/1td03/1TD03_2e_RTO_Jitter_Analysis.pdf]

Correlated vs. Uncorrelated

If the PDF of one jitter source changes when the PDF of another source is changed, then those two sources are dependent or correlated

image-20250816080432083

Inter-Symbol Interference (ISI)

The primary cause of Data Dependent Jitter

image-20250816090326309

image-20250816090430513


Jitter measurements can be classified into three categories: cycle-to-cycle jitter, period jitter, and long-term jitter

Jitter is a key performance parameter. Need to know what matters in each case:

  • PJ for digital timing
  • LTJ for data converters and serial data
  • Phase noise for communications (not all bandwidths matter)

image-20240714095712249

The above Cycle-Cycle Jitter equation is wrong, \(\tau_1\) and \(\tau_2\) are not independent

Short Term Jitter

image-20230916235240675

image-20230916235314423

Period jitter, Jper is the short term variation in clock period compared to the average (mean) clock period.

Cycle-to-Cycle, Jcc is the time difference of two adjacent clock periods

Long Term Jitter (LTJ)

image-20230916235647723

image-20230916235709504

measuring LTJ

image-20230916235033464

Jitter Calculation Examples

image-20230917003028143

Jcc vs Jper

Estimating the RMS cycle-to-cycle jitter if all you have available is the RMS period jitter.

  • Cycle-to-cycle jitter - The short-term variation in clock period between adjacent clock cycles. This jitter measure, abbreviated here as \(J_{CC}\), may be specified as either an RMS or peak-to-peak quantity.
  • Period jitter - The short-term variation in clock period over all measured clock cycles, compared to the average clock period. This jitter measure, abbreviated here as \(J_{PER}\), may be specified as either an RMS or peak-to-peak quantity.

Let the variable below represent the variance of a single edge's timing jitter, i.e. the difference in time of a jittery edge versus an ideal edge, \(\sigma^2_j\)

If each edge's jitter is independent then the variance of the period jitter can be written as \[\begin{align} \sigma^2_\text{jper} &= (\sigma_\text{j(n+1)}-\sigma_\text{j(n)})^2 \\ &= \sigma_\text{j(n+1)}^2-2\sigma_\text{j(n+1)}\sigma_\text{j(n)})+\sigma_\text{j(n)})^2\\ &= \sigma_\text{j(n+1)}^2+\sigma_\text{j(n)})^2 \\ &=2\sigma^2_j \end{align}\]

In every cycle-to-cycle measurement we use one "interior" clock edge twice and therefore we must account for this

\[\begin{align} \sigma^2_\text{jcc} &= (\sigma_\text{jper(n+1)}-\sigma_\text{jper(n)})^2 \\ &=(\sigma_\text{j(n+2)}-2\sigma_\text{j(n+1)}+\sigma_\text{j(n)})^2 \end{align}\]

Since each edge's jitter is assumed to be independent and have the same statistical properties we can drop the cross correlation terms and write:

\[\begin{align} \sigma^2_\text{jcc} &=(\sigma_\text{j(n+2)}-2\sigma_\text{j(n+1)}+\sigma_\text{j(n)})^2 \\ &=\sigma_\text{j(n+2)}^2+4\sigma_\text{j(n+1)}^2+\sigma_\text{j(n)}^2 \\ &=6\sigma_\text{j}^2 \end{align}\]

The ratio of the variances is therefore \[ \frac{\sigma^2_\text{jcc}}{\sigma^2_\text{jper}} = \frac{6\sigma_\text{j}^2} {2\sigma_\text{j}^2}=3 \] Then \[ \sigma_\text{jcc} = \sqrt{3}\sigma_\text{per} \]

[Timing 101 #8: The Case of the Cycle-to-Cycle Jitter Rule of Thumb, Silicon Labs]

references

AN10007 Clock Jitter Definitions and Measurement Methods, SiTime [pdf]

SERDES Design and Simulation Using the Analog FastSPICE Platform, Silicon Creations [pdf]

Flexible clocking solutions in advanced processes from 180nm to 5nm, Silicon Creations [pdf]

One-size-fits-all PLLs for Advanced Samsung Foundry Processes, Silicon Creations [pdf]

Circuit Design and Verification of 7nm LowPower, Low-Jitter PLLs, Silicon Creations, [pdf]

Lecture 10: Jitter, ECEN720: High-Speed Links Circuits and Systems Spring 2023 [pdf]

Jitter 360° Knowledge Series [pdf, slides]

N. Da Dalt, "Tutorial: Jitter: Basic and Advanced Concepts, Statistics, and Applications," 2012 IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 2012 [slides, transcript ]

Loop Inductance is the sum of partial self-inductance and partial-mutual inductance


Magnetic Vector Potential (磁矢势)

Youjin Deng. 5-3 静磁场的基本规律 [http://staff.ustc.edu.cn/~yjdeng/EM2022/pdf/5-2(2022).pdf]

磁场不能用标量势描述

image-20250709195107708

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image-20250709200229266


image-20250708231822291

Partial Inductance

image-20250708230643776

self partial inductance

image-20250708233924675

mutual partial inductance

image-20250708234512418

Ex. two-wire

image-20250709001127400


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img

[https://www.oldfriend.url.tw/Q3D/ansys_ch_Partial_Loop_Inductance.html]

Current Return Path

image-20250705171613361

Current return paths are frequency dependent \(Z = R +j\omega L\)

  • Low frequency
    • \(R\) dominates - current use as many returns as possible to have parallel resistances
  • High frequency
    • \(j\omega L\)​ dominates - current use the closest possible return path to form the smallest possible loop inductance
  • Very high frequency
    • The current would be confined to the nearest possible return only at ultra-high frequencies (skin effect)

image-20250705170949035


skin effect & Dielectric loss

image-20250705170028485


EMX simulation

setup:

image-20250706004037966

frequency sweep:

image-20250706010943996

Cadence October 2020, Analysis of a Figure-Eight Inductor with EMX RAK

image-20250706010216105

proximity effect & skin effect

  • Skin effect concentrates current near the surface of a single conductor, while proximity effect concentrates current in specific regions of multiple conductors due to their interaction
  • Skin effect is caused by the conductor's own magnetic field, while proximity effect is caused by the magnetic field of a nearby conductor

proximity effect is a redistribution of electric current occurring in nearby parallel electrical conductors carrying alternating current (AC), caused by magnetic effects (eddy currents)

image-20250705163405433


skin effect is the tendency of AC current flow near the surface (or "skin") of a conductor, rather than throughout its cross-section, due to the magnetic field generated by the current itself

image-20250705165353751

Cause of skin effect

A main current \(I\) flowing through a conductor induces a magnetic field \(H\). If the current increases, as in this figure, the resulting increase in \(H\) induces separate, circulating eddy currents \(I_W\) which partially cancel the current flow in the center and reinforce it near the skin


Eddy current

By Lenz's law, an eddy current creates a magnetic field that opposes the change in the magnetic field that created it, and thus eddy currents react back on the source of the magnetic field

Electromagnetic coupling

Electric field coupling (also called capacitive coupling) occurs when energy is coupled from one circuit to another through an electric field

Two circuits above a signal return plane.

Magnetic field coupling (also called inductive coupling) occurs when energy is coupled from one circuit to another through a magnetic field

Two circuits above a signal return plane


For instance

  • magnetic coupling between multiple inductors
  • capacitive coupling between multiple transmission lines

Grounding

TODO 📅

Chapter 11 Layout and grounding [http://ieb-srv1.upc.es/gieb/tecniques/doc/EMC/pdfs/ScienceDirect_articles_27Jul2018_12-16-10.699/Chapter-11---Layout-and-grounding_2007_EMC-for-Product-Designers.pdf]

Decoupling Capacitor

image-20250705175343498

RLC network

[https://web.stanford.edu/class/archive/ee/ee371/ee371.1066/handouts/markChapt.pdf]

image-20250817105056325

image-20250817105203031image-20250817105308602

reference

ISSCC2002. Special Topic Evening Discussion Sessions SE1: Inductance: Implications and Solutions for High-Speed Digital Circuits [vSE1_Blaauw], [vSE1_Gauthier], [vSE1_Morton, [vSE1_Restle]]

Y. Massoud and Y. Ismail, "Gasping the impact of on-chip inductance," in IEEE Circuits and Devices Magazine, vol. 17, no. 4, pp. 14-21, July 2001 [https://sci-hub.se/10.1109/101.950046]

Clayton R. Paul, Partial Inductance [https://ewh.ieee.org/soc/emcs/acstrial/newsletters/summer10/PP_PartialInductance.pdf]

Cheung-Wei Lam. Common Misconceptions about Inductance & Current Return Path [https://ewh.ieee.org/r6/scv/emc/archive/022010Lam.pdf]

Randy Wolff. Signal Loop Inductance in [Pin] and [Package Model] [https://ibis.org/summits/feb10/wolff.pdf]

ANSYS Q3D Getting Started LE05. Module 5: Q3D Inductance Matrix Reduction [https://innovationspace.ansys.com/courses/wp-content/uploads/sites/5/2021/07/Q3D_GS_2020R1_EN_LE05_Ind_Matrix.pdf]


Paul, Clayton R. Inductance: Loop and Partial. Hoboken, N.J. : [Piscataway, N.J.]: Wiley ; IEEE, 2010.

Spartaco Caniggia. Signal Integrity and Radiated Emission of High‐Speed Digital Systems. Wiley 2008

Yuriy Shlepnev. How Interconnects Work: Characteristic Impedance and Reflections [https://www.linkedin.com/pulse/how-interconnects-work-characteristic-impedance-yuriy-shlepnev/]

-. How Interconnects Work: Bandwidth for Modeling and Measurements [https://www.linkedin.com/pulse/how-interconnects-work-bandwidth-modeling-yuriy-shlepnev/?trackingId=874kpm3XuNyV9D0eP6IioA%3D%3D]

Eric Bogatin. Pop Quiz: When is an Interconnect Not a Transmission Line? [https://www.signalintegrityjournal.com/blogs/4-eric-bogatin-signal-integrity-journal-technical-editor/post/265-pop-quiz-when-is-an-interconnect-not-a-transmission-line]

TeledyneLeCroy/SignalIntegrity Python tools for signal integrity applications [SignalIntegrityApp]

A Look at Transmission-Line Losses [http://blog.teledynelecroy.com/2018/06/a-look-at-transmission-line-losses.html]

How Much Transmission-Line Loss is Too Much? [http://blog.teledynelecroy.com/2018/06/how-much-transmission-line-loss-is-too.html]

Raymond Y. Chen, Raymond Y. Chen. Fundamentals of S Fundamentals of S-Parameter Parameter Modeling for Power Distribution Modeling for Power Distribution System (PDS) and SSO Analysis System (PDS) and SSO Analysis [https://ibis.org/summits/jun05/chen.pdf]

image-20250602155255711

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Transit frequency \(f_T\)

aka cut-off frequency

Gate (thermal) noise

image-20230709210517475

image-20230709211309265

image-20230709202930102

Two-Side Poly Contact & folding

image-20230709212015293

Both scheme yield a total distributed resistance of \(R_G/4\) for gate noise calculation

folding

finger 0 \[\begin{align} \overline{i_{tot,0}^2} &= \left(\frac{g_m}{2} \right)^2(4kT\frac{R_G/2}{3}) \\ &= g_m^2\left(4kT\frac{R_G}{3}\right)\frac{1}{2^2\cdot 2} \end{align}\]

similarly finger 1 \[ \overline{i_{tot,1}^2} = g_m^2\left(4kT\frac{R_G}{3}\right)\frac{1}{2^2\cdot 2} \] Assuming uncorrelated \[ \overline{i_{tot}^2} = \sum_{N=0}^1\overline{i_{tot,N}^2} =g_m^2\left(4kT\frac{R_G}{3}\right)\frac{1}{2^2\cdot 2} \cdot 2 = g_m^2\left(4kT\frac{R_G}{3}\right)\frac{1}{2^2} \] Generally \[ \overline{i_{tot}^2} = g_m^2\left(4kT\frac{R_G}{3}\right)\frac{1}{N^2} \] where the gate is decomposed into \(N\) parallel fingers

two-side poly contact

No alt text provided for this image

We fracture Gate poly at the center point, then we obtain 2 segments, both have same \(\frac{g_m}{2}\) and \(R_G/2\).

The derivation procedure is same with folding structure, i.e. plug \(N=2\) into \(\overline{i_{tot}^2} = g_m^2\left(4kT\frac{R_G}{3}\right)\frac{1}{N^2}\)

That is \[ \overline{i_{tot}^2} = g_m^2\left(4kT\frac{R_G}{12}\right) \] The input referred noise of gate resistance \[ \overline{V_{nRG}^2} = 4kT\frac{R_G}{12} \]

four equal gate fingers

image-20230709212818351

\[ \overline{i_{tot}^2} = g_m^2\left(4kT\frac{R_G}{3}\right)\frac{1}{4^2} \] Then \[ \overline{V_{nRG}^2} = \frac{\overline{i_{tot}^2}}{g_m^2} =4kT\frac{R_G}{48} \]

Gate resistance handling by parasitic extraction tools

They fracture the poly line at the intersection with the active (diffusion) layer, breaking it into "gate poly"(poly over active) and "field poly" (poly outside active)

gploy, fpoly

No alt text provided for this image

Gate poly is also fractured at the center point. Gate instance pin of the MOSFET (SPICE model) is connected to the center point of the gate poly. Gate poly is described by two parasitic resistors, connecting the fracture points.

image-20230709222642979

MOSFET extrinsic parasitic capacitance between gate poly and source / drain diffusion and contacts is calculated by parasitic extraction tools, and assigned to the nodes of the resistive networks.

Different extraction tools do this differently - some tools connect these parasitic capacitances to the center point of the gate poly, while some other tools connect them to the end points of the gate poly resistors.

\(\Delta\) gate model

This distributed network has a different AC and transient response than a simple lumped one-R and one-C circuit.

It was shown [B. Razavi] that such RC network behaves approximately the same as a network with one R and one C element, where C is the total capacitance, and R=1/3 * W/L rsh for single-side connected poly, and R=1/12 W/L * rsh for double-sided connected poly.

These coefficients - 1/3 and 1/12 - effectively enable an accurate reduced order model for the gate, reducing a large number of R and C elements to two (or three) resistors and one capacitor.

Gate Delta Model: where a gate is described by two positive and one negative resistors

image-20230709214200878

only applicable to contacts on gate overhangs

invalid for self-aligned gate contacts, where gate contact land directly on top of gate, not gate overhang

No alt text provided for this image

  1. 1-side gate contact \[ R_{eq,1side} =R_1 \parallel (R_2+R_1)= \frac{R_G}{6}\parallel (-\frac{R_G}{2}+\frac{R_G}{6})=\frac{R_G}{3} \]

  2. 2-side contact \[ R_{eq,2side}= R_1 \parallel R_1 = \frac{R_G}{6}\parallel \frac{R_G}{6} = \frac{R_G}{12} \]

Some SPICE simulators have problems handling negative resistors, that's possibly why this model did not get a wide adoption. Some foundries and PDKs support delta gate model, while some others don't.

Vertical component of gate resistance

In "old" technologies (pre-16nm), gate resistance was dominated by lateral resistance. However, in advanced technologies, multiple interfaces between gate material layers lead to a large vertical gate resistance.

No alt text provided for this image

It's very easy to check this in DSPF file - if gate instance pin is connected directly to the center of the gate poly - vertical resistance is not accounted for. If it is connected by a positive resistor to the center of the gate poly - that resistors represents the vertical gate resistance.

decap

decap-res.drawio

leakage current is determined by \(R_s + R_p\), and \(R_p \gg R_s\)

  • low freq: \(Z=R_s + R_p\)
  • high freq: \(Z=R_s\)

An example: \(R_s=200\space \Omega\), \(R_p = 8 \space M\Omega\) and \(C_\text{gate}=10\space fF\)

image-20240729205410196

reference

⭐ B. Razavi, Y. Ran, and K. F. Lee, “Impact of Distributed Gate Resistance on the Performance of MOS Devices,” IEEE Trans. Circuits and Systems, Part I, pp. 750–754, Nov. 1994.

⭐ Maxim Ershov, Diakopto. "Gate Resistance in IC design flow", [link, pdf]

A.J.Sholten et al., "FinFET compact modelling for analogue and RF applications", IEDM'2010 [https://sci-hub.se/10.1109/IEDM.2010.5703322]

Saha, Samar K.. “FinFET Devices for VLSI Circuits and Systems.” (2020).

Harpe, Pieter J. A., Andrea Baschirotto and Kofi A. A. Makinwa. “Hybrid ADCs, Smart sensors for the IoT, and Sub-1V and Advanced node analog circuit design: Advances in Analog Circuit Design 2017.” (2018).

Chauhan, Yogesh Singh. FinFET Modeling for IC Simulation and Design: Using the BSIM-CMG Standard. London, UK: Academic Press, 2015.

A.J.Sholten et al., "FinFET compact modelling for analogue and RF applications", IEDM'2010, p.190.

W. Wu and M. Chan, “Gate resistance modeling of multifin MOS devices,” IEEE Electron Device Letters, vol. 27, no. 1, pp. 68-70, Jan. 2006.

A. L. S. Loke, C. K. Lee and B. M. Leary, "Nanoscale CMOS Implications on Analog/Mixed-Signal Design," 2019 IEEE Custom Integrated Circuits Conference (CICC), Austin, TX, USA, 2019, pp. 1-57, doi: 10.1109/CICC.2019.8780267.

Nonzero FFT bins

everynanocounts. Memos on FFT With Windowing. [https://a2d2ic.wordpress.com/2018/02/01/memos-on-fft-with-windowing]

The problem with sine-wave scaling is that the noise power is, on average, evenly distributed over all FFT bins, whereas the sine-wave power is concentrated in only a few bins. With sine-wave scaling, the power of individual sine-wave components can be read directly from the spectral plot, but in order to determine the noise power, the powers of all the noise bins must be added together.

snr_final.drawio

We can't use Fourier transform of random signal

[https://raytroop.github.io/2023/11/10/random/#lti-systems-on-wss-processes]

\[\begin{align} \mathrm{SNR} &= \frac{X_\text{sig}^2}{X_\text{n}^2N} \\ &= \frac{X_\text{sig}^2\cdot \sum_k W_k^2}{X_\text{n}^2N\cdot \sum_k W_k^2} \\ &= \frac{\sum_\text{nb} X_\text{w,sig}^2}{N X_\text{w,n}^2} \end{align}\]

where \(\text{nb}\) is number of non-zero FFT bins

image-20250917184729018

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subplot(3,1,1);
for N = [16 256 1024]
wrect = rectwin(N);
Wrect = fftshift(fft(wrect));
Wrect_mag = abs(Wrect)/sum(wrect);
nb_rect = sum(Wrect_mag > 0.1);
fprintf('Number of nonzero FFT bin(rect window N=%d): %d\n', N, nb_rect);
stem(1:N, Wrect_mag, LineWidth=2)
hold on
end
grid on
legend('16', '256', '1024')
title('rect window')

subplot(3,1,2);
for N = [16 256 1024]
whann = hann(N);
Whann = fftshift(fft(whann));
Whann_mag = abs(Whann)/sum(whann);
nb_hann = sum(Whann_mag > 0.1);
fprintf('Number of nonzero FFT bin(hann window N=%d): %d\n', N, nb_hann);
stem(1:N, Whann_mag, LineWidth=2)
hold on
end
grid on
legend('16', '256', '1024')
title('Hanning window')

subplot(3,1,3);
for N = [16 256 1024]
whann2 = (1-cos(2*pi*(0:N-1)/N)).^2/2^2;
Whann2 = fftshift(fft(whann2));
Whann2_mag = abs(Whann2)/sum(whann2);
nb_hann2 = sum(Whann2_mag > 0.1);
fprintf('Number of nonzero FFT bin(hann2 window N=%d): %d\n', N, nb_hann2);
stem(1:N, Whann2_mag, LineWidth=2)
hold on
end
grid on
legend('16', '256', '1024')
title('Hann2 window')


% Number of nonzero FFT bin(rect window N=16): 1
% Number of nonzero FFT bin(rect window N=256): 1
% Number of nonzero FFT bin(rect window N=1024): 1
% Number of nonzero FFT bin(hann window N=16): 3
% Number of nonzero FFT bin(hann window N=256): 3
% Number of nonzero FFT bin(hann window N=1024): 3
% Number of nonzero FFT bin(hann2 window N=16): 5
% Number of nonzero FFT bin(hann2 window N=256): 5
% Number of nonzero FFT bin(hann2 window N=1024): 5

[https://web.engr.oregonstate.edu/~temes/ece627/Lecture_Notes/FFT_for_delta_sigma_spectrum_estimation.pdf]

image-20250913174821087

where \(\mathrm{NBW} = \frac{\sum_{n}|w[n]|^2}{ \left| \sum_{n} w[n] \right|^2}\)

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% excerpt of A.4 An Example in Pavan, Schreier and Temes, "Understanding Delta-Sigma Data Converters, Second Edition" ISBN 978-1-119-25827-8
%
% Compute modulator output and actual NTF
%
OSR = 32;
ntf0 = synthesizeNTF(5,OSR,1);
N = 64*OSR;
fbin = 11;
u = 1/2*sin(2*pi*fbin/N*[0:N-1]);
[v tmp1 tmp2 y] = simulateDSM(u,ntf0);
k = mean(abs(y)/mean(y.^2))
ntf = ntf0 / (k + (1-k)*ntf0);
%
% Compute windowed FFT and NBW
%
w = hann(N); % or ones(1,N) or hann(N).^2
nb = 3; % 1 for Rect; 5 for Hann^2
w1 = norm(w,1);
w2 = norm(w,2);
NBW = (w2/w1)^2
V = fft(w.*v)/(w1/2);
%
% Compute SNR
%
signal_bins = fbin + [-(nb-1)/2:(nb-1)/2];
inband_bins = 0:N/(2*OSR);
noise_bins = setdiff(inband_bins,signal_bins);
snr = dbp(sum(abs(V(signal_bins+1)).^2)/sum(abs(V(noise_bins+1)).^2))

Noise Floor

[http://individual.utoronto.ca/schreier/lectures/2015/1.pdf]

image-20241202212412428

General Formula

signal tone power \[ P_{\text{sig}} = 2 \frac{X_{w,sig}^2}{S_1^2} \]

noise power \[ P_n = \frac{X_{w,n}^2}{N\cdot S_2}N=\frac{X_{w,n}^2}{S_2} \]

where white noise, \(X_n(i) = X_n(j)\) for any \(i \neq j\)

Therefore, displayed SNR is obtained \[\begin{align} \mathrm{SNR} &= 10\log10\left(\frac{X_{w,sig}^2}{X_{w,n}^2}\right) \\ &= 10\log_{10}\left(\frac{P_{\text{sig}}}{P_n}\right) + 10\log_{10}\left(\frac{S_1^2}{2S_2}\right) \\ &= \mathrm{SNR}'-10\log_{10}\left(\frac{2S_2}{S_1^2}\right) \\ &= \mathrm{SNR}'-10\log_{10}(2\cdot\mathrm{NBW}) \end{align}\]

DFT's output \(\mathrm{SNR}\)


\[ \text{PS(k)} = \text{PSD(k)} \cdot \text{ENBW} \]

where Effective Noise BandWidth \(\text{ENBW} =f_{\text{res}} \cdot \frac{N S_2}{S_1^2}\)

yield \[ \text{PS(k)} = \text{PSD(k)} \cdot f_{\text{res}} \cdot \frac{N S_2}{S_1^2} = \left\{\text{PSD(k)} \cdot f_{\text{s}} \right\} \cdot \frac{S_2}{S_1^2} \] where \(\left\{\text{PSD(k)} \cdot f_{\text{s}} \right\} =\text{const}\), i.e. \(x_\text{n,rms}\)

image-20250826003933143

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ratio_list = [];
for len = 6:12
wnd = hanning(2^len);
S2 = sum(wnd.^2);
S1 = sum(wnd);
ratio = S2./S1.^2;
ratio_list(end+1) = ratio;
end

ratio_db = 10*log10(ratio_list);
plot(2.^[6:1:12], ratio_db, 'ro-', LineWidth=4)
grid on; grid minor;

xlabel('N'); ylabel("$10\log(S_2/S_1^2)$",'Interpreter', 'latex')

FFT Noise Floor

image-20250826010627757

image-20250826013036595

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N = 2048;
cycles = 67;
fs = 1000;
fx = fs*cycles/N;
LSB = 2/2^10;
%generate signal, quantize (mid-tread) and take FFT
x = cos(2*pi*fx/fs*[0:N-1]);
x = round(x/LSB)*LSB;
s = abs(fft(x));
s = s(1:end/2)/N*2;
% calculate SNR
sigbin = 1 + cycles;
noise = [s(1:sigbin-1), s(sigbin+1:end)];
snr = 10*log10( s(sigbin)^2/sum(noise.^2) );

sdb = 20*log10(s);

% How to plot a series of numbers which some of them are inf?
% https://www.mathworks.com/matlabcentral/answers/476643-how-to-plot-a-series-of-numbers-which-some-of-them-are-inf
plot([0:N/2-1]/N, max(sdb, -120), LineWidth=4)
hold on;
plot([0 0.5], [-61.9 -61.9], 'r--', LineWidth=2)
plot([0 0.5], [-92 -92], 'm--', LineWidth=2)
grid on; grid minor;
ylim([-120 0]); xlim([0 0.5]);
xlabel('Frequency [f/fs]'), ylabel('DFT Magnitude [dBFS]');
title('2048 point FFT, SNR=61.90dB')

Noise Spectral Density (NSD)

Understanding Key Parameters for RF-Sampling Data Converters White Paper (WP509) [https://docs.amd.com/v/u/en-US/wp509-rfsampling-data-converters]

Boris Murmann, ISSCC2022 SC1: Introduction to ADCs/DACs: Metrics, Topologies, Trade Space, and Applications [https://www.nishanchettri.com/isscc-slides/2022%20ISSCC/SHORT%20COURSE/SC1.pdf]

image-20250826005956497


image-20250902010512726

Rectangular Window

DFT bin's output noise standard deviation (rms) value is proportional to \(\sqrt{N}\), and the DFT's output magnitude for the bin containing the signal tone is proportional to \(N\)

signal tone power \[ P_{\text{sig}} = 2 \frac{X_{w,sig}^2}{N^2} \]

noise power \[ P_n = \frac{X_{w,n}^2}{N} \]

The displayed SNR \[ \mathrm{SNR} = \mathrm{SNR}' - 10\log_{10}(2/N) \] If we increase a DFT's size from \(N\) to \(2N\), the DFT's output SNR increased by 3dB. So we say that a DFT's processing gain increases by 3dB whenever \(N\) is doubled.


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for N=[2^6 2^8 2^10 2^12]
wd = rectwin(N);
nbw = enbw(wd)/N;
snr_shift = 10*log10(nbw * 2);
disp(snr_shift);
end

output:

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-15.0515

-21.0721

-27.0927

-33.1133

image-20241202212221239

image-20241202213152360

How spectrum analyzer work?

We tried to plot a power spectral density together with something that we want to interpret as a power spectrum

  • spectrum of a periodic signal
  • spectral density of a broadband signal such as noise

Sine-wave components are located in individual FFT bins, but broadband signals like noise have their power spread over all FFT bins!

The noise floor depends on the length of the FFT

PS and PSD

The spectral density format is appropriate for random or noise signals but inappropriate for discrete frequency components because the latter theoretically have zero bandwidth

Amplitude Correction

  1. A finite-duration window \(w[n]\)

    DTFT is \(W[e^{j\omega}]\) and the maximum magnitude is is at DC frequency, which \(\sum_n w_n\)

  2. Sinusoidal signal \(x[n]\)

    DFS is \(X_k\), and DTFT shall be \(\frac{2\pi}{N}X_k(e^{j\omega})\)

  3. the windowed sequence \(v[n] = x[n]w[n]\)

    with multiplication property, DTFT of \(v[n]\) shall be \(\frac{X_k(e^{j\omega})}{N}\sum_n w_n\)

    As we know, DFT of \(v[n]\) is samples of its DTFT, that is \[ \frac{X_k(e^{j\omega})}{N}\sum_n w_n = X_v[k] \] Therefore, \[ \frac{X_k(e^{j\omega})}{N} = \frac{X_v[k]}{\sum_n w_n} \]

Effective Noise BandWidth (ENBW)

General derivation

The relationship between a power spectrum (\(PS, V^2\)) and a power spectral density (\(PSD, V^2/Hz\)) is given by the effective noise bandwidth (ENBW), which can easily be determined at the time when the DFT is computed.

ENBW should always be recorded when a spectrum or spectral density is computed, such that the result can be converted to the other form at a later stage, when the information about the frequency resolution \(f_{res}\) and the window that was used is normally not easily available any more.

The normalized equivalent noise bandwidth (NENBW) of the window is given by

\[ \text{NENBW} = \frac{NS_2}{S_1^2} \] where \(S_1 = \sum _{k=0}^{N-1}w_k\) and \(S_2 = \sum _{k=0}^{N-1}w_k^2\)

The ENBW is given by

\[ \text{ENBW} = \text{NENBW}\cdot f_{res} = \text{NENBW}\cdot \frac{f_s}{N} = f_s\frac{S_2}{S_1^2} \]

Equivalent noise bandwidth (ENBW) compares a window to an ideal, rectangular time-window. It is the bandwidth of the rectangular window's frequency-domain shape that passes the same amount of white noise energy as the frequency-domain shape defined by the other window.

enbw

Therefore, the equivalent noise bandwidth \(B_{enbw}\) is given by

\[ B_{enbw} = \frac{\int_{-f}^{f} |W(f)|^2 df}{|W(f_0)|^2} \]

Translating to discrete domain, the equivalent noise bandwidth can be computed using DFT samples as

\[ B_{enbw} =\frac{\sum_{k=0}^{N-1}|W[k]|^2}{|W[k_0]|^2} \]

where \(k_0\) is the index at which the magnitude of FFT output is maximum and \(N\) is the window length, i.e. \(k_0=0\).

Applying Parseval's theorem and \(W[0]=\sum_{n}w[n]\), \(B_{enbw}\) can also be computed using time domain samples as

\[ B_{enbw} = N \frac{\sum_{n}|w[n]|^2}{ \left| \sum_{n} w[n] \right|^2} \]

scale \(w[n]\) don't change \(B_{enbw}\)

Noise power inside window: \(\int_{-f}^{f} |W(f)|^2 df \to N\cdot\sum_{n}|w[n]|^2\)

peak amplitude: \(|W(f_0)|^2 \to \left| \sum_{n} w[n] \right|^2\)

An alternative derivation

coherence-incoherence.drawio.svg

Assuming the windowed sequence \(v[n] = x[n]w[n]\)

  • \(W[k]\): Fourier Transform of finite sequence window

  • \(X_{sig}\): Fourier Transform of signal

  • \(X_{n}\): Fourier Transform of noise

  • \(X_{v,sig}\): Fourier Transform of windowed signal

  • \(X_{v,n}\): Fourier Transform of windowed noise

From Fig. 6,, we observe that the amplitude of the harmonic estimate at a given frequency is biased by the accumulated broad-band noise included in the bandwidth of the window.

image-20240517195407690

In this sense, the window behaves as a filter, gathering contributions for its estimate over its bandwidth

The Fourier Transform of windowed signal can be expressed as

\[\begin{align} X_{v,sig} &= W_{max}\cdot X_{sig} \\ &= W[0]\cdot X_{sig} \end{align}\]

For a typical window, \(W_{max}\) occurs at \(\omega = 0\)

And the Fourier Transform of windowed noise can be expressed as

\[ X_{v,n}^2 = \sum_k (W[k])^2 \cdot X_n^2 \]

divided by \((W[0])^2\) on both sides of the above equation

\[ \frac{X_{v,n}^2}{(W[0])^2} = \frac{\sum_k (W[k])^2}{(W[0])^2} \cdot X_n^2 \]

By Parseval's theorem

\[ \frac{X_{v,n}^2}{\left(\sum_n w[n]\right)^2} = \frac{N\sum_n w^2[n]}{\left(\sum_n w[n]\right)^2} \cdot X_n^2 \]

where \(X^2_n\) is what is deserved and

\[ X_n^2 = \frac{PS_{n}}{B_{enbw}} \]

where \(B_{enbw} = N \frac{\sum_{n}|w[n]|^2}{ \left| \sum_{n} w[n] \right|^2}\) and \(PS_{n}=\left| \frac{X_{v,n}}{\sum_n w[n]}\right|^2\)

example

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lw = 128;
win = hann(lw);
lt = 2048;
windft = fftshift(fft(win,lt));

ad = abs(windft).^2;
mg = max(ad);

fs = 1000;

bw = enbw(win,fs);

bdef = sum((win).^2)/sum(win)^2*fs;
fprintf("bw: %.3f\n", bw);
fprintf("bdef: %.3f\n", bdef);

freq = -fs/2:fs/lt:fs/2-fs/lt;

plot(freq,ad, bw/2*[-1 -1 1 1],mg*[0 1 1 0],'--')
xlim(bw*[-1 1])

Adiff = trapz(freq,ad)-bw*mg;
fprintf("Adiff: %.3e\n", Adiff);

Verify that the area of the rectangle contains the same total power as the window.

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Adiff = trapz(freq,ad)-bw*mg
output:
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bw: 11.811
bdef: 11.811
Adiff: 7.276e-12

image-20230530230434715


Unpingco, José. Python for Signal Processing: Featuring IPython Notebooks. Cham: Springer, 2013. [pdf]

[https://github.com/unpingco/Python-for-Signal-Processing/blob/master/Windowing_Part2.ipynb]

image-20250902002913214

demo

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%https://aaronscher.com/Course_materials/Communication_Systems/documents/PSD_Autocorrelation_Noise.pdf

%Clear variables. clear command window, close all figures:
clc;
clear all;
close all;
%%%Setup and define variables
f0=10; %frequency of sinusoidal signal (Hz)
fs=100; %sampling frequency (Hz)
Ts=1/fs; %sampling period (seconds)
N0=3000; %number of samples
t=[0:Ts:Ts*(N0-1)]; %Sample times
noise_PSD=.5; %This is the desired noise power spectral density in W/Hz.
variance=noise_PSD*fs;% Variance = sigma^2
sigma=sqrt(variance);
noise=transpose(sigma*randn(N0,1));%create sampled white Gaussian noise.
xsignal=20*sin(2*pi*f0*t); %create sampled sinusoidal signal
x=xsignal+noise; %Add signal to noise
figure(1)
histogram(noise,30) %plot histogram
set(gca,'FontSize',14) %set font size of axis tick labels to 18
xlabel('Noise amplitude','fontsize',14)
ylabel('Frequency of occurance','fontsize',14)
title('Simulated histogram of white Gaussian noise','fontsize',14)
SNR_try1=snr(xsignal,noise); %calculate SNR using built in "snr" function.
SNR_try2=10*log10(sum(xsignal.^2)/sum(noise.^2)); %manually calculate SNR.
%If everything is correct, the two SNR calculations above should agree.
%Plot noise in time-domain
figure(2)
plot(t,x)
set(gca,'FontSize',14) %set font size of axis tick labels to 18
xlabel('Time (s)','fontsize',14)
ylabel('Amplitude','fontsize',14)
title('Noisey sinusoid','fontsize',14)
grid on
%Plot power spectral density (PSD) of noise using three different methods:
%
%Method 1. Calcululate PSD from amplitude spectrum
N=2^16; %Number of discrete points in the FFT
y=fft(x,N)/fs; %fft of noise
z=fftshift(y);%center noise spectrum
f_vec=[0:1:N-1]*fs/N-fs/2; %designate sample frequencies
amplitude_spectrum=abs(z); %compute two-sided amplitude spectrum
ESD1=amplitude_spectrum.^2; %ESD = |F(w)|^2;
PSD1=ESD1/((N0-1)*Ts);% PSD=ESD/T where T = total time of sample
figure(3)
plot(f_vec,10*log10(PSD1));
xlabel('Frequency [Hz]','fontsize',14)
ylabel('dB/Hz','fontsize',14)
title('Power spectral density - method 1','fontsize',14)
grid on
set(gcf,'color','w'); %set background color from grey (default) to white
axis tight
%calculate average power using PSD calclated from method 1:
Average_power_method_1=sum(PSD1)*fs/N; % Pav=sum(PSD)*delta_f where delta_f=fs/N;
%
%Method 2 - Calculate PSD from autocorrelation
time_lag=((-length(x)+1):1:(length(x)-1))*Ts;
auto_cor=xcorr(x,x)/fs; %Use xcorr function to find PSD
y=1/fs*fft(auto_cor,N); %fft of auto correlation function
PSD2=abs(1/(N0-1)*fftshift(fft(auto_cor,N)));
figure(4)
plot(f_vec,10*log10(PSD2));%use convolution
xlabel('Frequency [Hz]','fontsize',14)
ylabel('dB/Hz','fontsize',14)
title('Power spectral density - method 2','fontsize',14)
grid on
set(gcf,'color','w'); %set background color from grey (default) to white
axis tight
%calculate average power using PSD calclated from method 1:
Average_power_method_2=sum(PSD2)*fs/N; %Pav=sum(PSD)*delta_f where delta_f=fs/N;
%
%Method 3 - Calculate PSD using built in pwelch function
figure(5)
PSD3=periodogram(x,[],N,fs,'centered');
plot(10*log10(PSD3))
xlabel('Frequency [Hz]','fontsize',14)
ylabel('dB/Hz','fontsize',14)
title('Power spectral density - method 3','fontsize',14)
grid on
set(gcf,'color','w'); %set background color from grey (default) to white
axis tight
Average_power_method_3=sum(PSD3)*fs/N; %Pav=sum(PSD)*delta_f where delta_f=fs/N;
%
%Calculate mean and average PSD of noise:
PSD_noise=periodogram(noise,[],N,fs,'centered');
Average_noise_PSD=mean(PSD_noise);
Mean_noise=mean(noise);

image-20230531004822838

image-20230531005008418

The power spectral density plots for methods 2 and 3 exactly match that for method 1 (shown above).

reference

enbw Matlab URL:https://www.mathworks.com/help/signal/ref/enbw.html

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N = 256;
wn = hanning(N);
s1 = sum(wn)^2;
s2 = sum(wn.^2);

(N*s2)/s1
enbw(wn)
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ans =

1.4942


ans =

1.4942

Schmid, H. (2012). How to use the FFT and Matlab's pwelch function for signal and noise simulations and measurements. URL:http://www.schmid-werren.ch/hanspeter/publications/2012fftnoise.pdf

Bonnie C.Baker. Reading and Using Fast Fourier Transforms (FFT) URL:http://ww1.microchip.com/downloads/en/appnotes/00681a.pdf

FFT analysis: SNR and Noise level vary with FFT Window size URL:https://www.virtins.com/forum/viewtopic.php?f=7&t=1382

Lyons, R. G. (2011). Understanding digital signal processing (3rd ed.). Prentice Hall

Stefan Scholl, "Exact Signal Measurements using FFT Analysis",Microelectronic Systems Design Research Group, TU Kaiserslautern, Germany. [pdf]

Aaron Scher. PSD, Autocorrelation, and Noise in MATLAB [pdf]

Aaron Scher. FFT, total energy, and energy spectral density computations in MATLAB [pdf]

Amplitude Estimation and Zero Padding URL:https://www.mathworks.com/help/signal/ug/amplitude-estimation-and-zero-padding.html

Harris, F. (1978). On the use of windows for harmonic analysis with the discrete Fourier transform. Proceedings of the IEEE, 66, 51-83. [pdf]

Harris, F. J. . (1976). Windows, harmonic analysis and the discrete fourier transform. [pdf]

Wang Hongwei. Virtins. Evaluation of Various Window Functions using Multi-Instrument [pdf]

Properties of FFT Windows Used in Stable32 [pdf]

Solomon, Jr, O M. PSD computations using Welch's method. [Power Spectral Density (PSD)]. United States. https://doi.org/10.2172/5688766 [pdf]

Measure Power of Deterministic Periodic Signals [https://www.mathworks.com/help/signal/ug/measuring-the-power-of-deterministic-periodic-signals.html]

Mathuranathan. Equivalent noise bandwidth (ENBW) of window functions. [https://www.gaussianwaves.com/2020/09/equivalent-noise-bandwidth-enbw-of-window-functions/]

recordingblogs, Equivalent noise bandwidth [https://www.recordingblogs.com/wiki/equivalent-noise-bandwidth]

unpingco, Python for Signal Processing [https://github.com/unpingco/Python-for-Signal-Processing/blob/master/Windowing_Part2.ipynb]

Pavan, Schreier and Temes, "Understanding Delta-Sigma Data Converters, Second Edition" ISBN 978-1-119-25827-8

A finite-length data record = an infinite record multiplied by a rectangular window

Windowing is unavoidable


Applying the Hanning window (or any window) to a periodic signal creates leakage.

leakage:

​ The component at one frequency leaks into the vicinity of another compnent owing to the spectral smearing introdued by window.

Notice side lobes adding out of phase can reduce the heights of the peaks

Windowed Signal

Short transient signals in the time domain produce high, broadband frequency content.

sharpTransient

To reduce leakage, a mathematical function called a window is applied to the data. Windows are designed to reduce the sharp transient in the re-created signal as much as possible.

windowedsignal

Because the sharp transients are reduced and smoothed, the broadband frequency of the spectral leakage is also reduced.

Periodic versus Non-Periodic Background

When performing a Fourier Transform on measurement data, a window affects periodic and non-periodic data differently:

  • Periodic (No Window needed): A signal captured in a periodic manner does not require a window, and a resulting Fourier Transform has no leakage. Applying a window alters the resulting Fourier transform, and even creates spectral leakage where there would have been no leakage otherwise.

  • Non-periodic (Window needed): Windows are used on signals that are captured in a non-periodic manner to reduce spectral leakage and get closer to the periodic results. A window can minimize the leakage present in a non-periodic signal, but cannot eliminate it.

The signal is repeated and appended mathematically because the measured data is assumed to be representative of the entire original signal

Periodic

When a measurement signal is captured in a periodic manner, the Fourier Transform of the captured signal will have no leakage in the frequency domain.

A window is not recommended for a periodic signal as it will distort the signal in an unnecessary manner, and actually creates spectral leakage.

captured-periodic


Maloberti, F. Data Converters. Dordrecht, Netherlands: Springer, 2007.

image-20250825231711883

image-20250825232155617

Non-periodic

The same sine wave, with a different measurement time, results in a non-periodic captured signal. Here, when the captured signal is repeated, the original sine wave signal is not re-created.

captured-nonperiodic

In fact, several broadband transient events (circled in red) are introduced. These transients create a broadband response, or leakage.

Windows are used to minimize this leakage effect in the frequency domain.

leakage-vs-nonleakage

Hanning

When doing operational noise and vibration measurements, the Hanning window is commonly used.

Random data has spectral leakage due to the abrupt cutoff at the beginning and end of the time block. It is non-periodic.

There is no way to ensure that the captured random signal is periodic by varying the measurement time.

Hanning windows are often used with random data because they have moderate impact on the frequency resolution and amplitude accuracy of the resulting frequency spectrum.

  • The maximum amplitude error of a Hanning window is 15%

    In the cited article, all spectral data had an amplitude correction factor applied.

  • while the frequency leakage is typically confined to 1.5 spectral lines to each side of the original sine wave signal

hanning.png

periodic signal

Applying the Hanning window (or any window) to a periodic signal creates leakage.

hanning-periodicsignal

The periodically captured sine wave with the Hanning window (blue) is wider in frequency than the original signal (red)

In the figure, the sine wave with the Hanning window (blue) is wider in frequency than the original signal (red).

non-periodic signal

When a Hanning window is applied to a non-periodic signal, the leakage is greatly reduced and the amplitude is higher.

hanning-nonperiodicsignal

A non-periodically captured sine wave (magenta) has a spectral leakage over the entire bandwidth, applying a Hanning window minimized the leakage (green)

RMS calculation

A RMS calculation sums up the energy within a frequency range.

rms-cal

  • both the RMS of the periodic and non-periodic signals with a Hanning window are equal to the RMS of the leakage-free sine wave.

  • Only the RMS of the non-periodic sine wave without a window applied is not equal to the others

With the leakage spread over a smaller frequency range, doing analysis calculations like RMS yields more accurate results.

Flattop

  • The Flattop window has a better amplitude accuracy in frequency domain compared to the Hanning window,

    The maximum amplitude error of a Flattop window is less than 0.01%. By contrast, the Hanning window maximum amplitude error is 15%.

  • A Flattop window confines leakage to 3.43 spectral lines to each side of the original signal.

amplitude errors

These maximum amplitude errors assume that amplitude correction factors are applied to the frequency spectrums. These amplitude correction factors compensate for any reduction caused by applying a window.

flattop-amplitude

leakage

The frequency accuracy of the Flattop window is more coarse compared to a Hanning window. As a result, the Flattop window is typically employed on data where frequency peaks are distinct and well separated from each other.

flattop-leakage

When the frequency peaks are not guaranteed to be well separated, the Hanning window is preferred because it is less likely to cause individual peaks to be lost in the spectrum

flattop-2tone

Spectrum of two periodically captured tones that are \(4Hz\) apart with a \(1Hz\) frequency resolution. The spectrum with a Hanning window (green) shows two peaks while the spectrum with a Flattop window (blue) shows one peak.

Note that at the original frequencies of the tones the amplitude is correct and equal to one for both windows.

One common application for a flattop window is performing calibration. For example, a sound pistonphone only produces one single and distinct frequency during microphone calibration.

Uniform

A Uniform window has a value of 1.0 across the entire measurement time. In reality, a Uniform window could be called no window.

Depending on the data acquisition system used, sometimes the term Rectangular window is also used.

  • A Uniform window creates no frequency or amplitude distortion when the measured signal is periodic.

  • When a measured signal is not periodic, the amplitude is reduced by a maximum of 36% and the frequency content is spread over the entire bandwidth of the measurement.

    This is due to sharp transients that are created by repeating and appending the measured signal.

Whenever a measurement signal is periodic, a Uniform window is preferred.

Applying a Hanning or Flattop window to a periodic signal will actually create amplitude and frequency distortion.

uniformwindow

Benefit of Reducing Leakage

The benefit is not that the captured signal is perfectly replicated.

The main benefit is that the leakage is now confined over a smaller frequency range, instead of affecting the entire frequency bandwidth of the measurement.

With the leakage spread over a smaller frequency range, doing analysis calculations like RMS yields more accurate results.

rms-windowed

It is impossible to calculate the proper RMS amplitude estimate over a limited frequency range of the un-windowed sine wave, since the leakage is over the full frequency range. Therefore the RMS amplitude is not correct.

Two tones

In the case of two closely spaced sine tones, without a window being applied, two tones frequencies would leak into each other, which make determining the true amplitude of individual peaks very difficult.

The window makes it easier to separate and distinguish each tone so a proper analysis could be performed.

windowed-2tone

window function in frequency domain

The transfer function \(a(f)\) of a window \(w_j, j \in [0, N-1]\) expresses the response of the window to a sinusoidal signal at an offset of \(f\) frequency bins, i.e. DFT .

real part: \[ a_r(f)=\sum_{j=0}^{N-1}w_j\cos (2\pi f j/N) \]

imaginary part: \[ a_i(f)=\sum_{j=0}^{N-1}w_j\sin (2\pi f j/N) \]

frequency response can be obtained as \[ a(f) = \frac{\sqrt{a_r^2+a_i^2}}{S_1} \] where \(S_1 = \sum _{k=0}^{N-1}w_k\)

Rectangular window example

aka. Uniform window, "Rectangular" window, "no window"

Whenever a measurement signal is periodic, a Uniform window is preferred. Applying a Hanning or Flattop window to a periodic signal will actually create amplitude and frequency distortion.

  1. When \(f=0\)

\[ a_r(f) + ja_i(f) = \sum_{k=0}^{N-1}w_k = N \]

  1. When \(f \neq 0\)

\[\begin{align} a_r(f) + ja_i(f) &= \sum_{k=0}^{N-1} e^{\frac{j2\pi k f}{N}} \\ &= \sum_{k=0}^{N/2} e^{\frac{j2\pi k f}{N}} + e^{\frac{j2\pi (k+N/2) f}{N}} \\ &= \sum_{k=0}^{N/2} e^{\frac{j2\pi k f}{N}} + e^{j\pi} e^{\frac{j2\pi k f}{N}} \\ &= \sum_{k=0}^{N/2} e^{\frac{j2\pi k f}{N}} - e^{\frac{j2\pi k f}{N}} \\ &= 0 \end{align}\]

A Uniform window creates no frequency or amplitude distortion when the measured signal is periodic.

However, if the signal cannot be guaranteed to be periodic, a Uniform window should be avoided.

Window Properties

There is no possibility of trade-off between main-lobe width and sied-lobe amplitude, since the window length is the only variable parameter.

The rectangular window has the narrowest main lobe for a given length, i.e. \(\Delta _{ml}=4\pi/L\)

Other windows include the Bartlett, Hann, and Hamming windows. The DTFTs of all these windows have main-lobe width \(\Delta _{ml}=8\pi/(L-1)\), which is approximately twice that of the rectangular window, but they have significantly smaller side-lobe amplitudes.

Demo

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clc;
clear all;

N = 512;
fs = 40*1e3; % 40kHz
fres = fs/N; % 78.125
tt = (0:N-1)*1/fs;
ff = (0:N/2)*fres;
fin = 390.625;

whan = hanning(N); % hanning window
wrect = rectwin(N); % rect window


% fin/fs = 5/N, periodically captured sine wave
wv = cos(2*pi*fin*tt);
power = periodogram(wv, whan, N, fs, 'power');
X = (power).^0.5*2^0.5;
psd = periodogram(wv, whan, N, fs, 'psd');
rms = sum(psd*fres)^0.5;
fprintf('RMS@periodic & hanning: %.5f\n', rms);

power_rect = periodogram(wv, wrect, N, fs, 'power');
X_rect = (power_rect).^0.5*2^0.5;
psd_rect = periodogram(wv, wrect, N, fs, 'psd');
rms_rect = sum(psd_rect*fres)^0.5;
fprintf('RMS@periodic & rect: %.5f\n', rms_rect);


figure(1)
plot(ff, X, 'r-o', ff, X_rect, 'b-s');
xlabel('Frequency(Hz)');
ylabel('|X|')
title('Amplitude spectrum of periodically captured sine wave');
legend('w/ hanning', 'w/ rect');
grid on
grid minor
% rectangular window provide higher frequency resolution
% hanning window induce leakage for the periodically captured sine wave



% fin - 0.5fres
fin_lkg0d5 = fin - 0.5*fres;
wv_lkg0d5 = cos(2*pi*fin_lkg0d5*tt);
power_lkg0d5 = periodogram(wv_lkg0d5, whan, N, fs, 'power');
X_lkg0d5 = (power_lkg0d5).^0.5*2^0.5;
psd_lkg0d5 = periodogram(wv_lkg0d5, whan, N, fs, 'psd');
rms_lkg0d5 = sum(psd_lkg0d5*fres)^0.5;
fprintf('RMS@-0.5fres & hanning: %.5f\n', rms_lkg0d5);

power_lkg0d5_rect = periodogram(wv_lkg0d5, wrect, N, fs, 'power');
X_lkg0d5_rect = (power_lkg0d5_rect).^0.5*2^0.5;
psd_lkg0d5_rect = periodogram(wv_lkg0d5, wrect, N, fs, 'psd');
rms_lkg0d5_rect = sum(psd_lkg0d5_rect*fres)^0.5;
fprintf('RMS@-0.5fres & rect: %.5f\n', rms_lkg0d5_rect);

figure(2)
plot(ff, X_lkg0d5, 'r-o', ff, X_lkg0d5_rect, 'b-s');
xlabel('Frequency(Hz)');
ylabel('|X|')
title('Amplitude spectrum of -0.5fres');
legend('w/ hanning', 'w/ rect');
grid on
grid minor
% hanning reduce leakage and max amplitude error 15%



% fin - 0.25fres
fin_lkg0d25 = fin - 0.25*fres;
wv_lkg0d25 = cos(2*pi*fin_lkg0d25*tt);
power_lkg0d25 = periodogram(wv_lkg0d25, whan, N, fs, 'power');
X_lkg0d25 = (power_lkg0d25).^0.5*2^0.5;
psd_lkg0d25 = periodogram(wv_lkg0d25, whan, N, fs, 'psd');
rms_lkg0d25 = sum(psd_lkg0d25*fres)^0.5;
fprintf('RMS@-0.25fres & hanning: %.5f\n', rms_lkg0d25);

power_lkg0d25_rect = periodogram(wv_lkg0d25, wrect, N, fs, 'power');
X_lkg0d25_rect = (power_lkg0d25_rect).^0.5*2^0.5;
psd_lkg0d25_rect = periodogram(wv_lkg0d25, wrect, N, fs, 'psd');
rms_lkg0d25_rect = sum(psd_lkg0d25_rect*fres)^0.5;
fprintf('RMS@-0.25fres & rect: %.5f\n', rms_lkg0d25_rect);

figure(3)
plot(ff, X_lkg0d25, 'r-o', ff, X_lkg0d25_rect, 'b-s');
xlabel('Frequency(Hz)');
ylabel('|X|')
title('Amplitude spectrum of -0.25fres');
legend('w/ hanning', 'w/ rect');
grid on
grid minor
% hanning reduce leakage

output

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RMS@periodic & hanning: 0.70711
RMS@periodic & rect: 0.70711
RMS@-0.5fres & hanning: 0.70711
RMS@-0.5fres & rect: 0.70711
RMS@-0.25fres & hanning: 0.70711
RMS@-0.25fres & rect: 0.70780

image-20230526005823613

rectangular window provide higher frequency resolution

image-20230526005934411

hanning reduce leakage and max amplitude error 15%

image-20230526010047826

hanning reduce leakage and reduce amplitude error

reference

Windows and Spectral Leakage. URL:https://community.sw.siemens.com/s/article/windows-and-spectral-leakage

Article (20416822) Title: How to Utilize a Windowing Technique for Accurate DFT URL: https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1Od000000050UrEAI

B.P. Lathi, Roger Green. Linear Systems and Signals (The Oxford Series in Electrical and Computer Engineering) 3rd Edition

Window Types: Hanning, Flattop, Uniform, Tukey, and Exponential URL:https://community.sw.siemens.com/s/article/window-types-hanning-flattop-uniform-tukey-and-exponential

Window Correction Factors URL:https://community.sw.siemens.com/s/article/window-correction-factors

Root Mean Square (RMS) and Overall Level. URL:https://community.sw.siemens.com/s/article/root-mean-square-rms-and-overall-level

Alan V Oppenheim, Ronald W. Schafer. Discrete-Time Signal Processing, 3rd edition

Stefan Scholl, "Exact Signal Measurements using FFT Analysis",Microelectronic Systems Design Research Group, TU Kaiserslautern, Germany. [ pdf ]

Harris, F. (1978). On the use of windows for harmonic analysis with the discrete Fourier transform. Proceedings of the IEEE, 66, 51-83. [pdf]

Equivalent noise bandwidth (ENBW) of window functions URL:https://www.gaussianwaves.com/2020/09/equivalent-noise-bandwidth-enbw-of-window-functions/

Why should I zero-pad a signal before taking the Fourier transform? URL:https://dsp.stackexchange.com/q/741

enbw function in MATLAB URL:https://www.mathworks.com/help/signal/ref/enbw.html

Window function – figure of merits URL:https://www.gaussianwaves.com/2020/09/window-function-figure-of-merits/

Memos on FFT With Windowing URL:https://a2d2ic.wordpress.com/2018/02/01/memos-on-fft-with-windowing/

Jens Ahrens, "Some Notes on Windows in Spectral Analysis," Tech. Report, Chalmers Univeristy of Technology, 2020. URL:https://appliedacousticschalmers.github.io/scaling-of-the-dft/notes_on_windows/

Digital Delay Model

Akio Kitagawa, Analog layout design https://mixsignal.files.wordpress.com/2013/03/analog-layout.pdf

THE WIRE http://bwrcs.eecs.berkeley.edu/Classes/icdesign/ee141_f01/Notes/chapter4.pdf

Anoop Veliyath, Design Engineer, Cadence Design Systems. Accurately Modeling Transmission Line Behavior with an LC Network-based Approach [pdf]

Mark Horowitz. Lecture 2: Wires and Wire Models [pdf]

Neil Weste and David Harris. 2010. CMOS VLSI Design: A Circuits and Systems Perspective (4th. ed.). Addison-Wesley Publishing Company, USA.

Cheng-Kok Koh. EE695K Modeling and Optimization of High Performance Interconnect [lec3a_pdf]

Vishal Saxena. ECE 445 Intro to VLSI Design: Lectures for Spring 2019 https://www.eecis.udel.edu/~vsaxena/courses/ece445/s19/ECE445.htm

Effective Switching resistance

image-20231114001209252

https://www.eecis.udel.edu/~vsaxena/courses/ece445/s19/Lecture%20Notes/lec15_ece445.pdf

wire delay

Elmore Delay

image-20230624234813719

image-20230624234940864

image-20230625001756173

Basic idea: use of mean of \(v'(t)\) to approximate median of \(v'(t)\)

image-20230624235148246

image-20230625002239199

Elmore delay approximates the median of \(h(t)\) by the mean of \(h(t)\)

Distributed RC-Line

image-20230624224005736

Lumped approximations

\(rc\)-models

If your simulator does not support a distributed \(rc\)-model, or if the computational complexity of these models slows down your simulation too much, you can construct a simple yet accurate model yourself by approximating the distributed \(rc\) by a lumped RC network with a limited number of elements

image-20230624230057265

The accuracy of the model is determined by the number of stages. For instance, the error of the \(\Pi -3\) model is less than 3%, which is generally sufficient.


Why use "\(\Pi\) Model"

image-20230624230800255


examples

image-20230624224643487

image-20230624224923241

Wire Inductive Effect

  • RC delay increases quadratically with length
  • LC delay (speed of light flight time) increases linearly with length

Inductance will only be important to the delay of low-resistance signals such as wide clock lines


wave

Signal propagates over the wire as a wave (rather than diffusing as in \(rc\) only models)

Signal propagates by alternately transferring energy from capacitive to inductive modes

Glitches & Hazards

CPE166/EEE 270 Advanced Logic Design-Digital Design: Time Behavior of Combinational Networks: https://www.csus.edu/indiv/p/pangj/166/f/sram/Handout_Hazard.pdf

John Knight, ELEC3500 Glitches and Hazards in Digital Circuits http://www.doe.carleton.ca/~shams/ELEC3500/hazards.pdf

  • A glitch is an unwanted pulse at the output of a combinational logic network – a momentary change in an output that should not have changed
  • A circuit with the potential for a glitch is said to have a hazard
  • In other words a hazard is something intrinsic about a circuit; a circuit with hazard may or may not have a glitch depending on input patterns and the electric characteristics of the circuit.

When do circuits have hazards ?

Hazards are potential unwanted transients that occur in the output when different paths from input to output have different propagation delays

Types of Hazards (on an output)

static 1-hazard, static 0-hazard, dynamic hazard

image-20220508183800744

Hazard's Concern

  • Hazards do not hurt synchronous circuits
  • Hazards Kill Asynchronous Circuits
  • Glitches Increase Power Consumption

Isolation cells

Isolation cells and Level Shifter cells URL: https://vlsitutorials.com/isolation-cells-level-shifter-cells-low-power-vlsi/

Isolation cells are additional cells inserted by the synthesis tools for isolating the buses/wires crossing from power-gated domain of a circuit to its always-on domain (AON).

To prevent corruption of always-on domain, we clamp the nets crossing the power domains to a value depending upon the design.

A simple circuit having a switchable (or gated) power domain

isolation-cells-1-1

The circuit shown in Figure 1, after isolation cells are inserted

isolation-cells-2

Always-On Buffer

640?wx_fmt=png

image-20230211001607578

image-20230211001708189

image-20230211001849150

Clock Gating

The Ultimate Guide to Clock Gating https://anysilicon.com/the-ultimate-guide-to-clock-gating/

Clock Gating is defined as: "Clock gating is a technique/methodology to turn off the clock to certain parts of the digital design when not needed".

AND gate-based clock gating

In simplest form a clock gating can be achieved by using an AND gate as shown in picture below

clock gating

However, this simplest form of clock gating technique has some problem of generating glitches in the clock provide to the FF, which are not desirable.

img

Glitches in enable/gated clock

Latch based clock gating

These glitches can be removed by introducing a negative edge triggered FF (assuming downstream FFs are positive edge) or low-level sensitive latch at the output of the clock enable signal.

clock gating

This will make sure that any glitch in the clock enable signal will not be visible to the gated clock output. The Latch output will only be updated during the negative clock cycle and thus input to AND gate will be stable high.

clock gating

Glitch Free Gated Clock

OCV Derating With AOCV

Genus Attribute Reference 22.1

Innovus Text Command Reference 22.10

Article (20416394) Title: Analysis with Advanced On-chip Variation (AOCV) derating in EDI system and ETS URL: https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1Od000000050NxEAI

timing_aocv_derate_mode

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timing_aocv_derate_mode{aocv_multiplicative | aocv_additive}

Default: aocv_multiplicative

Controls the AOCV derating mode.

When set to aocv_multiplicative, the derating factor will be calculated as AOCV derating * OCV derating, which is set using the set_timing_derate command.

When set to aocv_additive, the derating factor will be calculated as AOCV derating + OCV derating values.

When you use this global variable, the report_timing command shows the total_derate column in the timing report output, which allows you to view and cross-check the calculated total derate factor.

To set this global variable, use the set_global command.

image-20221210143256639

preserve hand-instantiated cells

To preserve the hand-instantiated cells

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set_dont_touch [get_cells -hierarchical *dont_touch_*]

The instances whose name contain "dont_touch_" shall be preserved during synthesis

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// no performace concerns, rest sync use sync3 is enough

module CN_resetb_sync_cell
(
input resetb_in,
input clkdst,
output resetb_out
);

`ifdef USE_VERILOG
reg [2:0] resetb_dly;
`else
wire [2:0] resetb_dly;
`endif

`ifdef USE_VERILOG
always @(posedge clkdst or negedge resetb_in)
if (~resetb_in) resetb_dly <= 3'b000;
else resetb_dly <= {resetb_dly[1:0], 1'b1};
`else
SDFCNQD4 dont_touch_sync_flop0 (
.SI(1'b0),
.SE(1'b0),
.CP(clkdst),
.CDN(resetb_in),
.D(1'b1),
.Q(resetb_dly[0])
);
SDFCNQD4 dont_touch_sync_flop1 (
.SI(1'b0),
.SE(1'b0),
.CP(clkdst),
.CDN(resetb_in),
.D(resetb_dly[0]),
.Q(resetb_dly[1])
);
SDFCNQD4 dont_touch_sync_flop2 (
.SI(1'b0),
.SE(1'b0),
.CP(clkdst),
.CDN(resetb_in),
.D(resetb_dly[1]),
.Q(resetb_dly[2])
);
`endif

assign resetb_out = resetb_dly[2];

endmodule
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